From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 00/14] drm/i915: IRQ work for chv mostly
Date: Tue, 4 Nov 2014 18:42:16 +0200 [thread overview]
Message-ID: <20141104164216.GL10649@intel.com> (raw)
In-Reply-To: <CAKMK7uFEvG7BUxOY6uuFdQ+m0NpUzOQ+0qTyKcVbPeH=Pde7MA@mail.gmail.com>
On Tue, Nov 04, 2014 at 01:40:05PM +0100, Daniel Vetter wrote:
> On Tue, Nov 4, 2014 at 1:21 PM, Ville Syrjälä
> <ville.syrjala@linux.intel.com> wrote:
> >> > drm/i915: Refactor vlv_display_irq_uninstall()
> >>
> >> Except this, I think consens is that we don't need it?
> >
> > No, it's needed by the later patches. Trying to replace the vlv/chv
> > uninstall() hooks with reset() is best left for another series IMO.
> > And doing that involves more than just reviewing the the display irq
> > install/uninstall paths. Eg. currently VLV_MASTER_IER handling is
> > very inconsistent.
>
> Well I think we should just open-code it for chv and not do this
> extraction.
I don't see what the extraction hurts. If someone manages to unify it
more that's fine, but in the meantime it could at least prevent random
bugs from cropping up in one of the relevant platforms. Wouldn't be the
first time someone forgets about chv.
> All the complexity here is due to vlv runtime pm, and
> somehow I still think that this should work more magically. At least
> it should be possible if we start to handle power domains in the
> system s/r code instead of just force-enabling them all.
Well the same complexity is already there during driver init. So it just
comes from the power wells. Trying to avoid the force enable all thing
is a bit difficult because we can't really reconstruct the required
refcounts until we've read out the entire modeset state.
I guess one option would be to read out the current power well states
and convert that into temporary refcounts that get dropped after the
init is done. That would at least guarantee we don't prematurely turn
off anything that the BIOS already lit up. And as Imre pointed out to me,
we should then definitely add the unclaimed register check for vlv/chv
so that we might catch more easily any missing power well references
in the init path.
> So my idea was to drop this one and rebase the remaining few patches
> on top. That way we have a nice reminder that there's still work to
> do.
Such rebasing sounds like work without benefit to me.
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2014-11-04 16:42 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 17:42 [PATCH 00/14] drm/i915: IRQ work for chv mostly ville.syrjala
2014-10-30 17:42 ` [PATCH 01/14] drm/i915: Apply some ocd for IMR vs. IER order during irq enable ville.syrjala
2014-10-30 18:37 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 02/14] drm/i915: Use DPINVGTT_STATUS_MASK ville.syrjala
2014-10-30 18:41 ` Paulo Zanoni
2014-10-30 19:15 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 03/14] drm/i915: Use gen8_gt_irq_reset() in cherryview_irq_uninstall() ville.syrjala
2014-10-30 18:49 ` Paulo Zanoni
2014-10-30 19:20 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 04/14] drm/i915: Drop the extra GEN8_PCU_IIR posting read from cherryview_irq_preinstall() ville.syrjala
2014-10-30 18:51 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 05/14] drm/i915: Use a consistent order between IIR, IER, IMR writes on vlv/chv ville.syrjala
2014-10-30 19:24 ` Paulo Zanoni
2014-10-30 19:39 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 06/14] drm/i915: Use GEN5_IRQ_RESET() " ville.syrjala
2014-10-30 19:37 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 07/14] drm/i915: Call gen5_gt_irq_reset() from valleyview_irq_uninstall() ville.syrjala
2014-10-30 19:51 ` Paulo Zanoni
2014-10-31 9:35 ` Ville Syrjälä
2014-10-31 9:48 ` Ville Syrjälä
2014-11-03 16:30 ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 08/14] drm/i915: Make valleyview_display_irqs_(un)install() work for chv ville.syrjala
2014-10-30 20:12 ` Paulo Zanoni
2014-10-31 9:40 ` Ville Syrjälä
2014-11-03 16:32 ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 09/14] drm/i915: Refactor vlv_display_irq_reset() ville.syrjala
2014-10-30 20:19 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 10/14] drm/i915: Refactor vlv_display_irq_uninstall() ville.syrjala
2014-10-30 20:22 ` Paulo Zanoni
2014-10-30 20:37 ` Paulo Zanoni
2014-10-31 9:43 ` Ville Syrjälä
2014-10-30 17:43 ` [PATCH 11/14] drm/i914: Refactor vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:25 ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 12/14] drm/i915: Drop useless VLV_IIR writes from vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:28 ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 13/14] drm/i915: Use vlv display irq setup code for chv ville.syrjala
2014-10-30 20:41 ` Paulo Zanoni
2014-10-31 10:04 ` Ville Syrjälä
2014-11-14 17:38 ` Paulo Zanoni
2014-11-03 16:37 ` Daniel Vetter
2014-10-30 17:43 ` [PATCH 14/14] drm/i915: Reinit display irqs and hpd from chv pipe-a power well ville.syrjala
2014-11-14 17:49 ` Paulo Zanoni
2014-11-14 18:45 ` Ville Syrjälä
2014-11-17 8:17 ` Daniel Vetter
2014-10-31 9:53 ` [PATCH 15/14] drm/i915: Kill leftover GTIIR writes from valleyview_irq_preinstall() ville.syrjala
2014-11-03 16:38 ` [PATCH 00/14] drm/i915: IRQ work for chv mostly Daniel Vetter
2014-11-04 12:21 ` Ville Syrjälä
2014-11-04 12:40 ` Daniel Vetter
2014-11-04 16:42 ` Ville Syrjälä [this message]
2014-11-05 9:29 ` Daniel Vetter
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