From: Daniel Vetter <daniel@ffwll.ch>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 14/14] drm/i915: Reinit display irqs and hpd from chv pipe-a power well
Date: Mon, 17 Nov 2014 09:17:29 +0100 [thread overview]
Message-ID: <20141117081729.GS25711@phenom.ffwll.local> (raw)
In-Reply-To: <20141114184505.GF10649@intel.com>
On Fri, Nov 14, 2014 at 08:45:05PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 14, 2014 at 03:49:25PM -0200, Paulo Zanoni wrote:
> > 2014-10-30 15:43 GMT-02:00 <ville.syrjala@linux.intel.com>:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > On chv the pipe-a power well is the new disp2d well, and it kills pretty
> > > much everything in the display block. So we need to do the the same
> > > dance that vlv does wrt. display irqs and hpd when the power well goes
> > > up or down.
> >
> > I don't have the docs for this, so I have to ask: does it kill *all*
> > the interrupt bits (like VLV), or does it kill only the pipe A
> > interrupt bits (like BDW on pipes B/C)?
> >
> > If it kills everything: Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Yeah, everything goes even though it's called the "pipe A" power well.
> I think the plan was to have per-pipe wells, but then someone decided that
> it's not worth it. For some reason they still hooked it up to the pipe A
> power well bits instead of doing the more sensible thing and reusing the
> same bits that VLV used for this stuff.
Ok, I've merged the remaining patches from this series, thanks.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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next prev parent reply other threads:[~2014-11-17 8:17 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 17:42 [PATCH 00/14] drm/i915: IRQ work for chv mostly ville.syrjala
2014-10-30 17:42 ` [PATCH 01/14] drm/i915: Apply some ocd for IMR vs. IER order during irq enable ville.syrjala
2014-10-30 18:37 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 02/14] drm/i915: Use DPINVGTT_STATUS_MASK ville.syrjala
2014-10-30 18:41 ` Paulo Zanoni
2014-10-30 19:15 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 03/14] drm/i915: Use gen8_gt_irq_reset() in cherryview_irq_uninstall() ville.syrjala
2014-10-30 18:49 ` Paulo Zanoni
2014-10-30 19:20 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 04/14] drm/i915: Drop the extra GEN8_PCU_IIR posting read from cherryview_irq_preinstall() ville.syrjala
2014-10-30 18:51 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 05/14] drm/i915: Use a consistent order between IIR, IER, IMR writes on vlv/chv ville.syrjala
2014-10-30 19:24 ` Paulo Zanoni
2014-10-30 19:39 ` Ville Syrjälä
2014-10-30 17:42 ` [PATCH 06/14] drm/i915: Use GEN5_IRQ_RESET() " ville.syrjala
2014-10-30 19:37 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 07/14] drm/i915: Call gen5_gt_irq_reset() from valleyview_irq_uninstall() ville.syrjala
2014-10-30 19:51 ` Paulo Zanoni
2014-10-31 9:35 ` Ville Syrjälä
2014-10-31 9:48 ` Ville Syrjälä
2014-11-03 16:30 ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 08/14] drm/i915: Make valleyview_display_irqs_(un)install() work for chv ville.syrjala
2014-10-30 20:12 ` Paulo Zanoni
2014-10-31 9:40 ` Ville Syrjälä
2014-11-03 16:32 ` Daniel Vetter
2014-10-30 17:42 ` [PATCH 09/14] drm/i915: Refactor vlv_display_irq_reset() ville.syrjala
2014-10-30 20:19 ` Paulo Zanoni
2014-10-30 17:42 ` [PATCH 10/14] drm/i915: Refactor vlv_display_irq_uninstall() ville.syrjala
2014-10-30 20:22 ` Paulo Zanoni
2014-10-30 20:37 ` Paulo Zanoni
2014-10-31 9:43 ` Ville Syrjälä
2014-10-30 17:43 ` [PATCH 11/14] drm/i914: Refactor vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:25 ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 12/14] drm/i915: Drop useless VLV_IIR writes from vlv_display_irq_postinstall() ville.syrjala
2014-10-30 20:28 ` Paulo Zanoni
2014-10-30 17:43 ` [PATCH 13/14] drm/i915: Use vlv display irq setup code for chv ville.syrjala
2014-10-30 20:41 ` Paulo Zanoni
2014-10-31 10:04 ` Ville Syrjälä
2014-11-14 17:38 ` Paulo Zanoni
2014-11-03 16:37 ` Daniel Vetter
2014-10-30 17:43 ` [PATCH 14/14] drm/i915: Reinit display irqs and hpd from chv pipe-a power well ville.syrjala
2014-11-14 17:49 ` Paulo Zanoni
2014-11-14 18:45 ` Ville Syrjälä
2014-11-17 8:17 ` Daniel Vetter [this message]
2014-10-31 9:53 ` [PATCH 15/14] drm/i915: Kill leftover GTIIR writes from valleyview_irq_preinstall() ville.syrjala
2014-11-03 16:38 ` [PATCH 00/14] drm/i915: IRQ work for chv mostly Daniel Vetter
2014-11-04 12:21 ` Ville Syrjälä
2014-11-04 12:40 ` Daniel Vetter
2014-11-04 16:42 ` Ville Syrjälä
2014-11-05 9:29 ` Daniel Vetter
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