Re: [PATCH v2 2/3] drm/i915: Don't read 'HEAD' MMIO register in LRC mode

Deepak S
2014-11-24T08:00:21Z

On Wednesday 19 November 2014 01:37 AM, Dave Gordon wrote:
> The logical ring code was updating the software ring 'head' value
> by reading the hardware 'HEAD' register. In LRC mode, this is not
> valid as the hardware is not necessarily executing the same context
> that is being processed by the software. Thus reading the h/w HEAD
> could put an unrelated (undefined, effectively random) value into
> the s/w 'head' -- A Bad Thing for the free space calculations.
>
> Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 1003b3a..ad31373 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -891,7 +891,6 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> end = jiffies + 60 * HZ;
>
> do {
> - ringbuf->head = I915_READ_HEAD(ring);
> ringbuf->space = intel_ring_space(ringbuf);
> if (ringbuf->space >= bytes) {
> ret = 0;
>
> Looks fine to me

Reviewed-by: Deepak S<deepak.s@linux.intel.com>