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* [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
@ 2014-12-04 15:07 Michel Thierry
  2014-12-04 15:25 ` Ville Syrjälä
                   ` (2 more replies)
  0 siblings, 3 replies; 10+ messages in thread
From: Michel Thierry @ 2014-12-04 15:07 UTC (permalink / raw)
  To: intel-gfx

We already have it for chv, but was missing for bdw.

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 788e1b6..91ddcd1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -756,9 +756,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
 	 * workaround for for a possible hang in the unlikely event a TLB
 	 * invalidation occurs during a PSD flush.
 	 */
+	/* WaHdcDisableFetchWhenMasked:bdw */
 	/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
 	WA_SET_BIT_MASKED(HDC_CHICKEN0,
 			  HDC_FORCE_NON_COHERENT |
+			  HDC_DONOT_FETCH_MEM_WHEN_MASKED |
 			  (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
 
 	/* Wa4x4STCOptimizationDisable:bdw */
-- 
2.1.1

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-04 15:07 [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked Michel Thierry
@ 2014-12-04 15:25 ` Ville Syrjälä
  2014-12-04 15:36   ` Michel Thierry
  2014-12-05 14:41   ` Daniel Vetter
  2014-12-04 15:40 ` [PATCH v2] " Michel Thierry
  2014-12-04 19:58 ` [PATCH] " shuang.he
  2 siblings, 2 replies; 10+ messages in thread
From: Ville Syrjälä @ 2014-12-04 15:25 UTC (permalink / raw)
  To: Michel Thierry; +Cc: intel-gfx

On Thu, Dec 04, 2014 at 03:07:52PM +0000, Michel Thierry wrote:
> We already have it for chv, but was missing for bdw.
> 
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 788e1b6..91ddcd1 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -756,9 +756,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
>  	 * workaround for for a possible hang in the unlikely event a TLB
>  	 * invalidation occurs during a PSD flush.
>  	 */
> +	/* WaHdcDisableFetchWhenMasked:bdw */
>  	/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
>  	WA_SET_BIT_MASKED(HDC_CHICKEN0,
>  			  HDC_FORCE_NON_COHERENT |
> +			  HDC_DONOT_FETCH_MEM_WHEN_MASKED |
>  			  (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

We also seem to miss the w/a name for the "force non-coherent" thing.
Can you add that as well?

>  
>  	/* Wa4x4STCOptimizationDisable:bdw */
> -- 
> 2.1.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-04 15:25 ` Ville Syrjälä
@ 2014-12-04 15:36   ` Michel Thierry
  2014-12-05 14:41   ` Daniel Vetter
  1 sibling, 0 replies; 10+ messages in thread
From: Michel Thierry @ 2014-12-04 15:36 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx


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On 12/4/2014 3:25 PM, Ville Syrjälä wrote:
> On Thu, Dec 04, 2014 at 03:07:52PM +0000, Michel Thierry wrote:
>> We already have it for chv, but was missing for bdw.
>>
>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> index 788e1b6..91ddcd1 100644
>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>> @@ -756,9 +756,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
>>   	 * workaround for for a possible hang in the unlikely event a TLB
>>   	 * invalidation occurs during a PSD flush.
>>   	 */
>> +	/* WaHdcDisableFetchWhenMasked:bdw */
>>   	/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
>>   	WA_SET_BIT_MASKED(HDC_CHICKEN0,
>>   			  HDC_FORCE_NON_COHERENT |
>> +			  HDC_DONOT_FETCH_MEM_WHEN_MASKED |
>>   			  (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We also seem to miss the w/a name for the "force non-coherent" thing.
> Can you add that as well?
Sure, I'll add the missing _WaForceEnableNonCoherent:bdw_ label

>>   
>>   	/* Wa4x4STCOptimizationDisable:bdw */
>> -- 
>> 2.1.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx


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^ permalink raw reply	[flat|nested] 10+ messages in thread
* [PATCH v2] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-04 15:07 [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked Michel Thierry
  2014-12-04 15:25 ` Ville Syrjälä
@ 2014-12-04 15:40 ` Michel Thierry
  2014-12-04 23:11   ` shuang.he
  2014-12-04 19:58 ` [PATCH] " shuang.he
  2 siblings, 1 reply; 10+ messages in thread
From: Michel Thierry @ 2014-12-04 15:40 UTC (permalink / raw)
  To: intel-gfx

We already have it for chv, but was missing for bdw.

v2: Label WaForceEnableNonCoherent (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 788e1b6..5b51a43 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -756,9 +756,12 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
 	 * workaround for for a possible hang in the unlikely event a TLB
 	 * invalidation occurs during a PSD flush.
 	 */
+	/* WaForceEnableNonCoherent:bdw */
+	/* WaHdcDisableFetchWhenMasked:bdw */
 	/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
 	WA_SET_BIT_MASKED(HDC_CHICKEN0,
 			  HDC_FORCE_NON_COHERENT |
+			  HDC_DONOT_FETCH_MEM_WHEN_MASKED |
 			  (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
 
 	/* Wa4x4STCOptimizationDisable:bdw */
-- 
2.1.1

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^ permalink raw reply related	[flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-04 15:07 [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked Michel Thierry
  2014-12-04 15:25 ` Ville Syrjälä
  2014-12-04 15:40 ` [PATCH v2] " Michel Thierry
@ 2014-12-04 19:58 ` shuang.he
  2 siblings, 0 replies; 10+ messages in thread
From: shuang.he @ 2014-12-04 19:58 UTC (permalink / raw)
  To: shuang.he, intel-gfx, michel.thierry

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  364/364              364/364
ILK                                  366/366              366/366
SNB                                  450/450              450/450
IVB              +17                 481/498              498/498
BYT                                  289/289              289/289
HSW                                  564/564              564/564
BDW                                  417/417              417/417
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 IVB  igt_kms_3d      DMESG_WARN(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-128x128-onscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-128x128-random      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-128x128-sliding      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-256x256-offscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-256x256-onscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-256x256-sliding      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-64x64-offscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-64x64-onscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-64x64-random      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-64x64-sliding      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_cursor_crc_cursor-size-change      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_fence_pin_leak      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_rotation_crc_primary-rotation      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
 IVB  igt_kms_rotation_crc_sprite-rotation      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M34)
Note: You need to pay more attention to line start with '*'
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH v2] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-04 15:40 ` [PATCH v2] " Michel Thierry
@ 2014-12-04 23:11   ` shuang.he
  0 siblings, 0 replies; 10+ messages in thread
From: shuang.he @ 2014-12-04 23:11 UTC (permalink / raw)
  To: shuang.he, intel-gfx, michel.thierry

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  364/364              364/364
ILK                                  366/366              366/366
SNB                                  450/450              450/450
IVB              +17                 481/498              498/498
BYT                                  289/289              289/289
HSW                                  564/564              564/564
BDW                                  417/417              417/417
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 IVB  igt_kms_3d      DMESG_WARN(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-128x128-onscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-128x128-random      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-128x128-sliding      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-256x256-offscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-256x256-onscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-256x256-sliding      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-64x64-offscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-64x64-onscreen      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-64x64-random      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-64x64-sliding      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_cursor_crc_cursor-size-change      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_fence_pin_leak      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_rotation_crc_primary-rotation      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
 IVB  igt_kms_rotation_crc_sprite-rotation      NSPT(1, M34)PASS(8, M4M34M21)      PASS(1, M4)
Note: You need to pay more attention to line start with '*'
_______________________________________________
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^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-04 15:25 ` Ville Syrjälä
  2014-12-04 15:36   ` Michel Thierry
@ 2014-12-05 14:41   ` Daniel Vetter
  2014-12-09 13:37     ` Michel Thierry
  1 sibling, 1 reply; 10+ messages in thread
From: Daniel Vetter @ 2014-12-05 14:41 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

On Thu, Dec 04, 2014 at 05:25:56PM +0200, Ville Syrjälä wrote:
> On Thu, Dec 04, 2014 at 03:07:52PM +0000, Michel Thierry wrote:
> > We already have it for chv, but was missing for bdw.
> > 
> > Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 788e1b6..91ddcd1 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -756,9 +756,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
> >  	 * workaround for for a possible hang in the unlikely event a TLB
> >  	 * invalidation occurs during a PSD flush.
> >  	 */
> > +	/* WaHdcDisableFetchWhenMasked:bdw */
> >  	/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
> >  	WA_SET_BIT_MASKED(HDC_CHICKEN0,
> >  			  HDC_FORCE_NON_COHERENT |
> > +			  HDC_DONOT_FETCH_MEM_WHEN_MASKED |
> >  			  (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-05 14:41   ` Daniel Vetter
@ 2014-12-09 13:37     ` Michel Thierry
  2014-12-10  9:18       ` Daniel Vetter
  0 siblings, 1 reply; 10+ messages in thread
From: Michel Thierry @ 2014-12-09 13:37 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx


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On 12/5/2014 2:41 PM, Daniel Vetter wrote:
> On Thu, Dec 04, 2014 at 05:25:56PM +0200, Ville Syrjälä wrote:
>> On Thu, Dec 04, 2014 at 03:07:52PM +0000, Michel Thierry wrote:
>>> We already have it for chv, but was missing for bdw.
>>>
>>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Queued for -next, thanks for the patch.
> -Daniel

Hi Daniel,

Thanks for merging the patch, but you picked v1.
I sent an updated version adding the missing wa name in that same 
register, as Ville suggested 
(1417707632-8656-1-git-send-email-michel.thierry@intel.com).

-Michel


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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-09 13:37     ` Michel Thierry
@ 2014-12-10  9:18       ` Daniel Vetter
  2014-12-10  9:47         ` Michel Thierry
  0 siblings, 1 reply; 10+ messages in thread
From: Daniel Vetter @ 2014-12-10  9:18 UTC (permalink / raw)
  To: Michel Thierry; +Cc: intel-gfx

On Tue, Dec 09, 2014 at 01:37:21PM +0000, Michel Thierry wrote:
> On 12/5/2014 2:41 PM, Daniel Vetter wrote:
> >On Thu, Dec 04, 2014 at 05:25:56PM +0200, Ville Syrjälä wrote:
> >>On Thu, Dec 04, 2014 at 03:07:52PM +0000, Michel Thierry wrote:
> >>>We already have it for chv, but was missing for bdw.
> >>>
> >>>Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> >>>---
> >>>  drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
> >>>  1 file changed, 2 insertions(+)
> >>>
> >>Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >Queued for -next, thanks for the patch.
> >-Daniel
> 
> Hi Daniel,
> 
> Thanks for merging the patch, but you picked v1.
> I sent an updated version adding the missing wa name in that same register,
> as Ville suggested
> (1417707632-8656-1-git-send-email-michel.thierry@intel.com).

Oops sorry. Unfortunately that is already in the frozen part of dinq
history, so can't exchange. Can you please resubmit a new patch with just
the missing bits (and Ville's r-b included)?

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
  2014-12-10  9:18       ` Daniel Vetter
@ 2014-12-10  9:47         ` Michel Thierry
  0 siblings, 0 replies; 10+ messages in thread
From: Michel Thierry @ 2014-12-10  9:47 UTC (permalink / raw)
  To: Daniel Vetter; +Cc: intel-gfx


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On 12/10/2014 9:18 AM, Daniel Vetter wrote:
> On Tue, Dec 09, 2014 at 01:37:21PM +0000, Michel Thierry wrote:
>> On 12/5/2014 2:41 PM, Daniel Vetter wrote:
>>> On Thu, Dec 04, 2014 at 05:25:56PM +0200, Ville Syrjälä wrote:
>>>> On Thu, Dec 04, 2014 at 03:07:52PM +0000, Michel Thierry wrote:
>>>>> We already have it for chv, but was missing for bdw.
>>>>>
>>>>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
>>>>> ---
>>>>>   drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
>>>>>   1 file changed, 2 insertions(+)
>>>>>
>>>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> Queued for -next, thanks for the patch.
>>> -Daniel
>> Hi Daniel,
>>
>> Thanks for merging the patch, but you picked v1.
>> I sent an updated version adding the missing wa name in that same register,
>> as Ville suggested
>> (1417707632-8656-1-git-send-email-michel.thierry@intel.com).
> Oops sorry. Unfortunately that is already in the frozen part of dinq
> history, so can't exchange. Can you please resubmit a new patch with just
> the missing bits (and Ville's r-b included)?
>
> Thanks, Daniel

Sure, I just sent it.

Thanks,



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^ permalink raw reply	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2014-12-10  9:47 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-12-04 15:07 [PATCH] drm/i915/bdw: Add WaHdcDisableFetchWhenMasked Michel Thierry
2014-12-04 15:25 ` Ville Syrjälä
2014-12-04 15:36   ` Michel Thierry
2014-12-05 14:41   ` Daniel Vetter
2014-12-09 13:37     ` Michel Thierry
2014-12-10  9:18       ` Daniel Vetter
2014-12-10  9:47         ` Michel Thierry
2014-12-04 15:40 ` [PATCH v2] " Michel Thierry
2014-12-04 23:11   ` shuang.he
2014-12-04 19:58 ` [PATCH] " shuang.he

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