From: Daniel Vetter <daniel@ffwll.ch>
To: deepak.s@linux.intel.com
Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915: Forcewake Register Range changes for CHV
Date: Wed, 10 Dec 2014 18:02:39 +0100 [thread overview]
Message-ID: <20141210170239.GE27182@phenom.ffwll.local> (raw)
In-Reply-To: <1418314369-2752-1-git-send-email-deepak.s@linux.intel.com>
On Thu, Dec 11, 2014 at 09:42:49PM +0530, deepak.s@linux.intel.com wrote:
> From: Deepak S <deepak.s@linux.intel.com>
>
> According to updated BSpec, Render/Common/media Wells register range changed.
> Updating the same to match the spec and avoid extra forcewake for none
> forcewake range.
>
> v2: Update media forcewake range (Ville)
>
> Signed-off-by: Deepak S <deepak.s@linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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prev parent reply other threads:[~2014-12-10 17:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-11 7:18 [PATCH] drm/i915: Forcewake Register Range changes for CHV deepak.s
2014-12-10 14:31 ` Ville Syrjälä
2014-12-11 16:04 ` Deepak S
2014-12-11 16:12 ` [PATCH v2] " deepak.s
2014-12-10 17:02 ` Daniel Vetter [this message]
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