* [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits
@ 2014-12-10 22:00 Jesse Barnes
2014-12-11 8:40 ` shuang.he
2014-12-12 9:17 ` Ville Syrjälä
0 siblings, 2 replies; 7+ messages in thread
From: Jesse Barnes @ 2014-12-10 22:00 UTC (permalink / raw)
To: intel-gfx
Should address a warning reported in #79824.
References: https://bugs.freedesktop.org/show_bug.cgi?id=79824
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c424c36..a19544b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1607,7 +1607,9 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
BUG_ON(INTEL_INFO(dev)->gen >= 5);
/* PLL is protected by panel, make sure we can write it */
- if (IS_MOBILE(dev) && !IS_I830(dev))
+ if (IS_MOBILE(dev) && !IS_I830(dev) &&
+ (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
+ intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)))
assert_panel_unlocked(dev_priv, crtc->pipe);
/* Enable DVO 2x clock on both PLLs if necessary */
--
1.9.1
_______________________________________________
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits
2014-12-10 22:00 [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits Jesse Barnes
@ 2014-12-11 8:40 ` shuang.he
2014-12-11 15:24 ` Jesse Barnes
2014-12-12 9:17 ` Ville Syrjälä
1 sibling, 1 reply; 7+ messages in thread
From: shuang.he @ 2014-12-11 8:40 UTC (permalink / raw)
To: shuang.he, intel-gfx, jbarnes
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK +1-4 364/366 361/366
SNB 448/450 448/450
IVB 497/498 497/498
BYT 289/289 289/289
HSW 563/564 563/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*ILK igt_kms_pipe_crc_basic_bad-pipe PASS(2, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_busy-flip-interruptible PASS(5, M26) DMESG_WARN(1, M26)
*ILK igt_kms_flip_flip-vs-rmfb-interruptible NSPT(1, M26)PASS(5, M26) DMESG_WARN(1, M26)
ILK igt_kms_flip_plain-flip-ts-check-interruptible DMESG_WARN(1, M26)PASS(4, M26) DMESG_WARN(1, M26)
ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(7, M26)PASS(21, M26M37) PASS(1, M26)
Note: You need to pay more attention to line start with '*'
_______________________________________________
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits
2014-12-11 8:40 ` shuang.he
@ 2014-12-11 15:24 ` Jesse Barnes
0 siblings, 0 replies; 7+ messages in thread
From: Jesse Barnes @ 2014-12-11 15:24 UTC (permalink / raw)
To: shuang.he; +Cc: intel-gfx
On 11 Dec 2014 00:40:28 -0800
shuang.he@intel.com wrote:
> Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
> -------------------------------------Summary-------------------------------------
> Platform Delta drm-intel-nightly Series Applied
> PNV 364/364 364/364
> ILK +1-4 364/366 361/366
> SNB 448/450 448/450
> IVB 497/498 497/498
> BYT 289/289 289/289
> HSW 563/564 563/564
> BDW 417/417 417/417
> -------------------------------------Detailed-------------------------------------
> Platform Test drm-intel-nightly Series Applied
> *ILK igt_kms_pipe_crc_basic_bad-pipe PASS(2, M26) DMESG_WARN(1, M26)
> *ILK igt_kms_flip_busy-flip-interruptible PASS(5, M26) DMESG_WARN(1, M26)
> *ILK igt_kms_flip_flip-vs-rmfb-interruptible NSPT(1, M26)PASS(5, M26) DMESG_WARN(1, M26)
> ILK igt_kms_flip_plain-flip-ts-check-interruptible DMESG_WARN(1, M26)PASS(4, M26) DMESG_WARN(1, M26)
> ILK igt_kms_flip_wf_vblank-ts-check DMESG_WARN(7, M26)PASS(21, M26M37) PASS(1, M26)
> Note: You need to pay more attention to line start with '*'
Based on this log and the one for saving and restoring the GMbus clock,
it looks like we have some inconsistent results on ILK. Can you look
into the logs and file bugs against those tests if they're no already
filed?
Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
_______________________________________________
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits
2014-12-10 22:00 [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits Jesse Barnes
2014-12-11 8:40 ` shuang.he
@ 2014-12-12 9:17 ` Ville Syrjälä
2014-12-15 9:16 ` Daniel Vetter
2014-12-15 14:59 ` Jani Nikula
1 sibling, 2 replies; 7+ messages in thread
From: Ville Syrjälä @ 2014-12-12 9:17 UTC (permalink / raw)
To: Jesse Barnes; +Cc: intel-gfx
On Wed, Dec 10, 2014 at 02:00:02PM -0800, Jesse Barnes wrote:
> Should address a warning reported in #79824.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=79824
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Isn's this fixed by https://freedesktop.org/patch/37900/ ?
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c424c36..a19544b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1607,7 +1607,9 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
> BUG_ON(INTEL_INFO(dev)->gen >= 5);
>
> /* PLL is protected by panel, make sure we can write it */
> - if (IS_MOBILE(dev) && !IS_I830(dev))
> + if (IS_MOBILE(dev) && !IS_I830(dev) &&
> + (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
> + intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)))
> assert_panel_unlocked(dev_priv, crtc->pipe);
>
> /* Enable DVO 2x clock on both PLLs if necessary */
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits
2014-12-12 9:17 ` Ville Syrjälä
@ 2014-12-15 9:16 ` Daniel Vetter
2014-12-15 14:59 ` Jani Nikula
1 sibling, 0 replies; 7+ messages in thread
From: Daniel Vetter @ 2014-12-15 9:16 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Dec 12, 2014 at 11:17:19AM +0200, Ville Syrjälä wrote:
> On Wed, Dec 10, 2014 at 02:00:02PM -0800, Jesse Barnes wrote:
> > Should address a warning reported in #79824.
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=79824
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>
> Isn's this fixed by https://freedesktop.org/patch/37900/ ?
Yeah, I've updated the bug with the commit citation. If it doesn't work we
can revisit Jesse's patch here.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits
2014-12-12 9:17 ` Ville Syrjälä
2014-12-15 9:16 ` Daniel Vetter
@ 2014-12-15 14:59 ` Jani Nikula
2014-12-15 15:28 ` Ville Syrjälä
1 sibling, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2014-12-15 14:59 UTC (permalink / raw)
To: Ville Syrjälä, Jesse Barnes; +Cc: intel-gfx
On Fri, 12 Dec 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Wed, Dec 10, 2014 at 02:00:02PM -0800, Jesse Barnes wrote:
>> Should address a warning reported in #79824.
>>
>> References: https://bugs.freedesktop.org/show_bug.cgi?id=79824
>> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>
> Isn's this fixed by https://freedesktop.org/patch/37900/ ?
Off-topic, does that link really work for you?
Jani.
>
>> ---
>> drivers/gpu/drm/i915/intel_display.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index c424c36..a19544b 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -1607,7 +1607,9 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
>> BUG_ON(INTEL_INFO(dev)->gen >= 5);
>>
>> /* PLL is protected by panel, make sure we can write it */
>> - if (IS_MOBILE(dev) && !IS_I830(dev))
>> + if (IS_MOBILE(dev) && !IS_I830(dev) &&
>> + (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
>> + intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)))
>> assert_panel_unlocked(dev_priv, crtc->pipe);
>>
>> /* Enable DVO 2x clock on both PLLs if necessary */
>> --
>> 1.9.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits
2014-12-15 14:59 ` Jani Nikula
@ 2014-12-15 15:28 ` Ville Syrjälä
0 siblings, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2014-12-15 15:28 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Mon, Dec 15, 2014 at 04:59:42PM +0200, Jani Nikula wrote:
> On Fri, 12 Dec 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Wed, Dec 10, 2014 at 02:00:02PM -0800, Jesse Barnes wrote:
> >> Should address a warning reported in #79824.
> >>
> >> References: https://bugs.freedesktop.org/show_bug.cgi?id=79824
> >> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >
> > Isn's this fixed by https://freedesktop.org/patch/37900/ ?
>
> Off-topic, does that link really work for you?
Yes
>
> Jani.
>
>
>
> >
> >> ---
> >> drivers/gpu/drm/i915/intel_display.c | 4 +++-
> >> 1 file changed, 3 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index c424c36..a19544b 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -1607,7 +1607,9 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
> >> BUG_ON(INTEL_INFO(dev)->gen >= 5);
> >>
> >> /* PLL is protected by panel, make sure we can write it */
> >> - if (IS_MOBILE(dev) && !IS_I830(dev))
> >> + if (IS_MOBILE(dev) && !IS_I830(dev) &&
> >> + (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
> >> + intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)))
> >> assert_panel_unlocked(dev_priv, crtc->pipe);
> >>
> >> /* Enable DVO 2x clock on both PLLs if necessary */
> >> --
> >> 1.9.1
> >>
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> > --
> > Ville Syrjälä
> > Intel OTC
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Jani Nikula, Intel Open Source Technology Center
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
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2014-12-10 22:00 [PATCH] drm/i915/i9xx: check for panel on pipe before asserting panel unlock bits Jesse Barnes
2014-12-11 8:40 ` shuang.he
2014-12-11 15:24 ` Jesse Barnes
2014-12-12 9:17 ` Ville Syrjälä
2014-12-15 9:16 ` Daniel Vetter
2014-12-15 14:59 ` Jani Nikula
2014-12-15 15:28 ` Ville Syrjälä
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