From: Ben Widawsky <ben@bwidawsk.net>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Ben Widawsky <benjamin.widawsky@intel.com>,
Intel GFX <intel-gfx@lists.freedesktop.org>,
stable@vger.kernel.org
Subject: Re: [PATCH] drm/i915/hsw: Implement Selective Write workaround
Date: Fri, 19 Dec 2014 09:26:01 -0800 [thread overview]
Message-ID: <20141219172559.GA1509@bwidawsk.net> (raw)
In-Reply-To: <20141219082004.GA554@nuc-i3427.alporthouse.com>
On Fri, Dec 19, 2014 at 08:20:04AM +0000, Chris Wilson wrote:
> On Thu, Dec 18, 2014 at 06:20:18PM -0800, Ben Widawsky wrote:
> > From: Ben Widawsky <ben@bwidawsk.net>
> >
> > The docs specify this needs to be set on HSW GT1 parts. I've implemented it as
> > such since it should only be needed when using RC6, but it can probably go
> > anywhere.
> >
> > This patch fixes extremely reproducible hangs on our Jenkins setup.
> >
> > The interesting failure signature is:
> > IPEHR: 0x780c0000 (3DSTATE_VF)
> > INSTDONE_0: 0xffdfbffa (SVG + VS)
>
> We see the same bug on IVB, and the bug (verified on hsw gt1) persists with i915.enable_rc6=0.
> -Chris
I would claim it's not the same bug on IVB. The workaround very specifically
says HSW GT1 only. The failure signature itself is pretty generic, it just
suggests the VS went off and did something stupid, and the VF was unable to fill
the URB. (That's just my best guess) I do apologize if I inadvertently made a
connection to the IVB bug issue.
So, what is your point? I'm willing to concede we don't know all the facts, but
the [previous version of this] patch demonstrably fixes hangs on HSW GT1.
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next prev parent reply other threads:[~2014-12-19 17:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-19 2:20 [PATCH] drm/i915/hsw: Implement Selective Write workaround Ben Widawsky
2014-12-19 8:20 ` [Intel-gfx] " Chris Wilson
2014-12-19 17:26 ` Ben Widawsky [this message]
2014-12-19 18:34 ` Chris Wilson
2014-12-19 20:05 ` Chris Wilson
2014-12-19 22:14 ` Ben Widawsky
2015-01-05 10:02 ` Daniel Vetter
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