Re: [PATCH 4/4] drm/i915/skl: Updated the RC6/Forcewake related debugfs interface for Gen9

[Damien Lespiau <damien.lespiau@intel.com>]

On Fri, Jan 16, 2015 at 06:07:28PM +0000, Damien Lespiau wrote:
> From: Akash Goel <akash.goel@intel.com>
> 
> Updated the i915_drpc_info & i915_gen6_forcewake_count debugfs interface
> 
> v2: Change all IS_GEN9() by gen >= 9 (Damien)
> 
> Change-Id: Ibed2fb71b233a369e69278bc96298df82d032a47
> Signed-off-by: Akash Goel <akash.goel@intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

-- 
Damien

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 44 +++++++++++++++++++++++++++++++++++--
>  drivers/gpu/drm/i915/i915_reg.h     |  3 +++
>  2 files changed, 45 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index aac6126..b0a142d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1347,8 +1347,10 @@ static int gen6_drpc_info(struct seq_file *m)
>  	struct drm_device *dev = node->minor->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
> +	u32 gen9_powergate_enable = 0, gen9_powergate_status = 0;
>  	unsigned forcewake_count;
>  	int count = 0, ret;
> +	u32 fw_rendercount = 0, fw_mediacount = 0, fw_blittercount = 0;
>  
>  	ret = mutex_lock_interruptible(&dev->struct_mutex);
>  	if (ret)
> @@ -1374,6 +1376,10 @@ static int gen6_drpc_info(struct seq_file *m)
>  
>  	rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
>  	rcctl1 = I915_READ(GEN6_RC_CONTROL);
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		gen9_powergate_enable = I915_READ(GEN9_PG_ENABLE);
> +		gen9_powergate_status = I915_READ(GEN9_PWRGT_DOMAIN_STATUS);
> +	}
>  	mutex_unlock(&dev->struct_mutex);
>  	mutex_lock(&dev_priv->rps.hw_lock);
>  	sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
> @@ -1392,6 +1398,12 @@ static int gen6_drpc_info(struct seq_file *m)
>  		   yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
>  	seq_printf(m, "RC6 Enabled: %s\n",
>  		   yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		seq_printf(m, "Render Well Gating Enabled: %s\n",
> +			yesno(gen9_powergate_enable & 0x1));
> +		seq_printf(m, "Media Well Gating Enabled: %s\n",
> +			yesno(gen9_powergate_enable & 0x2));
> +	}
>  	seq_printf(m, "Deep RC6 Enabled: %s\n",
>  		   yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
>  	seq_printf(m, "Deepest RC6 Enabled: %s\n",
> @@ -1420,6 +1432,14 @@ static int gen6_drpc_info(struct seq_file *m)
>  
>  	seq_printf(m, "Core Power Down: %s\n",
>  		   yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		seq_printf(m, "Render Power Well: %s\n",
> +			(gen9_powergate_status &
> +			 GEN9_PWRGT_RENDER_STATUS_MASK) ? "Up" : "Down");
> +		seq_printf(m, "Media Power Well: %s\n",
> +			(gen9_powergate_status &
> +			 GEN9_PWRGT_MEDIA_STATUS_MASK) ? "Up" : "Down");
> +	}
>  
>  	/* Not exactly sure what this is */
>  	seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
> @@ -1437,6 +1457,20 @@ static int gen6_drpc_info(struct seq_file *m)
>  		   GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
>  	seq_printf(m, "RC6++ voltage: %dmV\n",
>  		   GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
> +
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		spin_lock_irq(&dev_priv->uncore.lock);
> +		fw_rendercount = dev_priv->uncore.fw_rendercount;
> +		fw_mediacount = dev_priv->uncore.fw_mediacount;
> +		fw_blittercount = dev_priv->uncore.fw_blittercount;
> +		spin_unlock_irq(&dev_priv->uncore.lock);
> +
> +		seq_printf(m, "Forcewake Render Count = %u\n", fw_rendercount);
> +		seq_printf(m, "Forcewake Media Count = %u\n", fw_mediacount);
> +		seq_printf(m, "Forcewake Blitter Count = %u\n",
> +							fw_blittercount);
> +	}
> +
>  	return 0;
>  }
>  
> @@ -1990,18 +2024,24 @@ static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
>  	struct drm_device *dev = node->minor->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	unsigned forcewake_count = 0, fw_rendercount = 0, fw_mediacount = 0;
> +	unsigned fw_blittercount = 0;
>  
>  	spin_lock_irq(&dev_priv->uncore.lock);
> -	if (IS_VALLEYVIEW(dev)) {
> +	if (IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen >= 9) {
>  		fw_rendercount = dev_priv->uncore.fw_rendercount;
>  		fw_mediacount = dev_priv->uncore.fw_mediacount;
> +		if (INTEL_INFO(dev)->gen >= 9)
> +			fw_blittercount = dev_priv->uncore.fw_blittercount;
>  	} else
>  		forcewake_count = dev_priv->uncore.forcewake_count;
> +
>  	spin_unlock_irq(&dev_priv->uncore.lock);
>  
> -	if (IS_VALLEYVIEW(dev)) {
> +	if (IS_VALLEYVIEW(dev) || INTEL_INFO(dev)->gen >= 9) {
>  		seq_printf(m, "fw_rendercount = %u\n", fw_rendercount);
>  		seq_printf(m, "fw_mediacount = %u\n", fw_mediacount);
> +		if (INTEL_INFO(dev)->gen >= 9)
> +		      seq_printf(m, "fw_blittercount = %u\n", fw_blittercount);
>  	} else
>  		seq_printf(m, "forcewake count = %u\n", forcewake_count);
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3d08f9d..81538c7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5945,6 +5945,9 @@ enum skl_disp_power_wells {
>  #define  FORCEWAKE_ACK_MEDIA_GEN9		0x0D88
>  #define  FORCEWAKE_ACK_RENDER_GEN9		0x0D84
>  #define  FORCEWAKE_ACK_BLITTER_GEN9		0x130044
> +#define  GEN9_PWRGT_DOMAIN_STATUS		0xA2A0
> +#define   GEN9_PWRGT_MEDIA_STATUS_MASK		(1 << 0)
> +#define   GEN9_PWRGT_RENDER_STATUS_MASK		(1 << 1)
>  #define   FORCEWAKE_KERNEL			0x1
>  #define   FORCEWAKE_USER			0x2
>  #define  FORCEWAKE_MT_ACK			0x130040
> -- 
> 1.8.3.1
> 
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