Re: [RFC] drm/i915: Android native sync support

From: Damien Lespiau <damien.lespiau@intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Intel-gfx@lists.freedesktop.org
Subject: Re: [RFC] drm/i915: Android native sync support
Date: Thu, 22 Jan 2015 15:47:16 +0000	[thread overview]
Message-ID: <20150122154716.GA3376@strange.ger.corp.intel.com> (raw)
In-Reply-To: <54C11704.7020401@linux.intel.com>

On Thu, Jan 22, 2015 at 03:28:04PM +0000, Tvrtko Ursulin wrote:
> 
> On 01/22/2015 02:04 PM, Damien Lespiau wrote:
> >On Thu, Jan 22, 2015 at 01:41:48PM +0000, Tvrtko Ursulin wrote:
> >>>>@@ -718,7 +718,7 @@ struct drm_i915_gem_execbuffer2 {
> >>>>  #define I915_EXEC_CONSTANTS_REL_SURFACE (2<<6) /* gen4/5 only */
> >>>>  	__u64 flags;
> >>>>  	__u64 rsvd1; /* now used for context info */
> >>>>-	__u64 rsvd2;
> >>>>+	__u64 rsvd2; /* now used for fence fd */
> >>>If we are going to use this slot for fence fd, may as well make it
> >>>supply both before/after.
> >>
> >>Not sure what you mean by before/after?
> >>
> >>In the future it will take in the input fence fd and return the output fence
> >>if that's what you mean.
> >
> >BTW, couldn't we take 32bits here and leave 32bits reserved?
> 
> I guess so. Any ideas why the same wasn't done with rsvd1 - I see only
> 32-bits are used for context id there?

Nop, no idea, except may if someone was doing an assert(p->rsvd2 == 0);
Spliting the field would break ABI.

-- 
Damien
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