* [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9
@ 2015-02-05 10:47 Nick Hoath
2015-02-05 10:47 ` [PATCH 01/10] drm/i915: ring w/a initialisation " Nick Hoath
` (9 more replies)
0 siblings, 10 replies; 26+ messages in thread
From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw)
To: intel-gfx
Implement a subset of known HardWare WorkArounds for gen 9.
v1: Make gen 9 common patchset, remove non-common w/a's, tidy up
patch names, tidy up register names (Req: Damien Lespiau).
Removed invalid WA (Found by
Arun Siluvery). Removed WaSetHdcUnitClockGatingDisableInUcgctl6
until feature exists (Found by Jeff Mcgee).
v2: Added stepping check for WAs. Removed WaDisableThreadStallDopClockGating
as not SKL WA (Found by Damien Lespiau). Don't add WaHdcDisableFetchWhenMasked.
Rebased as necessary.
v3: Use existing revision id
v4: Rebase to Intel DRM nightly. Moved register bitmap to correct patch.
Hoath, Nicholas (7):
drm/i915: ring w/a initialisation for gen 9
drm/i915: ring w/a gen 9 revision definitions
drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown)
drm/i915: gen 9 h/w w/a (WaDisableSDEUnitClockGating)
drm/i915: gen 9 h/w w/a (Wa4x4STCOptimizationDisable)
drm/i915: gen 9 h/w w/a (WaForceEnableNonCoherent)
drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS)
Nick Hoath (3):
drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5)
drm/i915: gen 9 h/w w/a (syncing dependencies between camera and
graphics)
drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7)
drivers/gpu/drm/i915/i915_drv.h | 6 ++++
drivers/gpu/drm/i915/i915_reg.h | 4 +++
drivers/gpu/drm/i915/intel_lrc.c | 15 ++++++++--
drivers/gpu/drm/i915/intel_pm.c | 26 ++++++-----------
drivers/gpu/drm/i915/intel_ringbuffer.c | 49 +++++++++++++++++++++++++++++++++
5 files changed, 79 insertions(+), 21 deletions(-)
--
2.1.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread* [PATCH 01/10] drm/i915: ring w/a initialisation for gen 9 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 17:39 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 02/10] drm/i915: ring w/a gen 9 revision definitions Nick Hoath ` (8 subsequent siblings) 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx From: "Hoath, Nicholas" <nicholas.hoath@intel.com> Add framework for gen 9 HW WAs v1: Changed SOC specific WA function to gen 9 common function (Req: Damien Lespiau) Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index e1036c8..fbfe65a 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -873,6 +873,11 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) return 0; } +static int gen9_init_workarounds(struct intel_engine_cs *ring) +{ + return 0; +} + int init_workarounds_ring(struct intel_engine_cs *ring) { struct drm_device *dev = ring->dev; @@ -888,6 +893,9 @@ int init_workarounds_ring(struct intel_engine_cs *ring) if (IS_CHERRYVIEW(dev)) return chv_init_workarounds(ring); + if (IS_GEN9(dev)) + return gen9_init_workarounds(ring); + return 0; } -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 01/10] drm/i915: ring w/a initialisation for gen 9 2015-02-05 10:47 ` [PATCH 01/10] drm/i915: ring w/a initialisation " Nick Hoath @ 2015-02-05 17:39 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 17:39 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:16AM +0000, Nick Hoath wrote: > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > Add framework for gen 9 HW WAs > > v1: Changed SOC specific WA function to gen 9 common function (Req: Damien Lespiau) > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index e1036c8..fbfe65a 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -873,6 +873,11 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) > return 0; > } > > +static int gen9_init_workarounds(struct intel_engine_cs *ring) > +{ > + return 0; > +} > + > int init_workarounds_ring(struct intel_engine_cs *ring) > { > struct drm_device *dev = ring->dev; > @@ -888,6 +893,9 @@ int init_workarounds_ring(struct intel_engine_cs *ring) > if (IS_CHERRYVIEW(dev)) > return chv_init_workarounds(ring); > > + if (IS_GEN9(dev)) > + return gen9_init_workarounds(ring); > + > return 0; > } > > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 02/10] drm/i915: ring w/a gen 9 revision definitions 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath 2015-02-05 10:47 ` [PATCH 01/10] drm/i915: ring w/a initialisation " Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 17:46 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) Nick Hoath ` (7 subsequent siblings) 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx From: "Hoath, Nicholas" <nicholas.hoath@intel.com> Add Skylake stepping Revision IDs definitions. v1: Use existing revision id. Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ca64b99..39e8b07 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2339,6 +2339,7 @@ struct drm_i915_cmd_table { }) #define INTEL_INFO(p) (&__I915__(p)->info) #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id) +#define INTEL_REVID(p) (p->pdev->revision) #define IS_I830(dev) (INTEL_DEVID(dev) == 0x3577) #define IS_845G(dev) (INTEL_DEVID(dev) == 0x2562) @@ -2386,6 +2387,11 @@ struct drm_i915_cmd_table { INTEL_DEVID(dev) == 0x0A1E) #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) +#define SKL_A0_REVID (0x0) +#define SKL_B0_REVID (0x1) +#define SKL_C0_REVID (0x2) +#define SKL_D0_REVID (0x3) + /* * The genX designation typically refers to the render engine, so render * capability related checks should use IS_GEN, while display and other checks -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 02/10] drm/i915: ring w/a gen 9 revision definitions 2015-02-05 10:47 ` [PATCH 02/10] drm/i915: ring w/a gen 9 revision definitions Nick Hoath @ 2015-02-05 17:46 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 17:46 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:17AM +0000, Nick Hoath wrote: > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > Add Skylake stepping Revision IDs definitions. > > v1: Use existing revision id. > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Namespacing is usually NAMESPACE_VALUE, so I guess it'd be SKL_REVID_A0, but meh. Also: #define INTEL_INFO(p) (&__I915__(p)->info) #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id) #define INTEL_REVID(p) (p->pdev->revision) We use 'p' as it can either be a struct drm_device pointer or a struct drm_i915_private pointer thanks to the magic __I915__ macro. Your define doesn't support that and so having a 'p' argument is misleading. So I'd either make the INTEL_REVID() magic as well or use 'dev' as argument. I'd be happy to go ahead though, so we can make some progress. Others may be of a different opinion :) Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index ca64b99..39e8b07 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2339,6 +2339,7 @@ struct drm_i915_cmd_table { > }) > #define INTEL_INFO(p) (&__I915__(p)->info) > #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id) > +#define INTEL_REVID(p) (p->pdev->revision) > > #define IS_I830(dev) (INTEL_DEVID(dev) == 0x3577) > #define IS_845G(dev) (INTEL_DEVID(dev) == 0x2562) > @@ -2386,6 +2387,11 @@ struct drm_i915_cmd_table { > INTEL_DEVID(dev) == 0x0A1E) > #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) > > +#define SKL_A0_REVID (0x0) > +#define SKL_B0_REVID (0x1) > +#define SKL_C0_REVID (0x2) > +#define SKL_D0_REVID (0x3) > + > /* > * The genX designation typically refers to the render engine, so render > * capability related checks should use IS_GEN, while display and other checks > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath 2015-02-05 10:47 ` [PATCH 01/10] drm/i915: ring w/a initialisation " Nick Hoath 2015-02-05 10:47 ` [PATCH 02/10] drm/i915: ring w/a gen 9 revision definitions Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 17:51 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 04/10] drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5) Nick Hoath ` (6 subsequent siblings) 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx From: "Hoath, Nicholas" <nicholas.hoath@intel.com> Add: WaDisablePartialInstShootdown v1: Dont add WaDisableThreadStallDopClockGating as not SKL WA. (Found by Damien Lespiau) Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index fbfe65a..b869f1c 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -875,6 +875,13 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) static int gen9_init_workarounds(struct intel_engine_cs *ring) { + struct drm_device *dev = ring->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + + /* WaDisablePartialInstShootdown:skl */ + WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, + PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); + return 0; } -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) 2015-02-05 10:47 ` [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) Nick Hoath @ 2015-02-05 17:51 ` Damien Lespiau 2015-02-06 8:52 ` Daniel Vetter 0 siblings, 1 reply; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 17:51 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:18AM +0000, Nick Hoath wrote: > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > Add: > WaDisablePartialInstShootdown Just an editor note: that's not really additional information compared to the subject of the patch. Also subject message could be a bit more direct and mention SKL: drm/i915/skl: Implement WaDisablePartialInstShootdown > v1: Dont add WaDisableThreadStallDopClockGating as not SKL WA. (Found by Damien Lespiau) v2, v1 was the original patch. Commit messages should also be wrapped like emails, so 90 chars is too long. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index fbfe65a..b869f1c 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -875,6 +875,13 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) > > static int gen9_init_workarounds(struct intel_engine_cs *ring) > { > + struct drm_device *dev = ring->dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > + > + /* WaDisablePartialInstShootdown:skl */ > + WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, > + PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); > + > return 0; > } > > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) 2015-02-05 17:51 ` Damien Lespiau @ 2015-02-06 8:52 ` Daniel Vetter 2015-02-06 9:36 ` Nick Hoath 0 siblings, 1 reply; 26+ messages in thread From: Daniel Vetter @ 2015-02-06 8:52 UTC (permalink / raw) To: Damien Lespiau; +Cc: intel-gfx On Thu, Feb 05, 2015 at 05:51:46PM +0000, Damien Lespiau wrote: > On Thu, Feb 05, 2015 at 10:47:18AM +0000, Nick Hoath wrote: > > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > > > Add: > > WaDisablePartialInstShootdown > > Just an editor note: that's not really additional information compared > to the subject of the patch. Also subject message could be a bit more > direct and mention SKL: > > drm/i915/skl: Implement WaDisablePartialInstShootdown Well it's gen9 but yeah. The commit message body should explain the commit (e.g. more details on impact), but for w/a that's only really required if there's been an outside report. > > v1: Dont add WaDisableThreadStallDopClockGating as not SKL WA. (Found by Damien Lespiau) > > v2, v1 was the original patch. Commit messages should also be wrapped > like emails, so 90 chars is too long. > > Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Frobbed commit while applying. -Daniel > > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> > > --- > > drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > > index fbfe65a..b869f1c 100644 > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > @@ -875,6 +875,13 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) > > > > static int gen9_init_workarounds(struct intel_engine_cs *ring) > > { > > + struct drm_device *dev = ring->dev; > > + struct drm_i915_private *dev_priv = dev->dev_private; > > + > > + /* WaDisablePartialInstShootdown:skl */ > > + WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, > > + PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); > > + > > return 0; > > } > > > > -- > > 2.1.1 > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) 2015-02-06 8:52 ` Daniel Vetter @ 2015-02-06 9:36 ` Nick Hoath 2015-02-09 18:10 ` Daniel Vetter 0 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-06 9:36 UTC (permalink / raw) To: Daniel Vetter, Lespiau, Damien; +Cc: intel-gfx@lists.freedesktop.org On 06/02/2015 08:52, Daniel Vetter wrote: > On Thu, Feb 05, 2015 at 05:51:46PM +0000, Damien Lespiau wrote: >> On Thu, Feb 05, 2015 at 10:47:18AM +0000, Nick Hoath wrote: >>> From: "Hoath, Nicholas" <nicholas.hoath@intel.com> >>> >>> Add: >>> WaDisablePartialInstShootdown >> >> Just an editor note: that's not really additional information compared >> to the subject of the patch. Also subject message could be a bit more >> direct and mention SKL: >> >> drm/i915/skl: Implement WaDisablePartialInstShootdown > > Well it's gen9 but yeah. The commit message body should explain the > commit (e.g. more details on impact), but for w/a that's only really > required if there's been an outside report. So an empty body is ok if the subject has sufficient information? > >>> v1: Dont add WaDisableThreadStallDopClockGating as not SKL WA. (Found by Damien Lespiau) >> >> v2, v1 was the original patch. Commit messages should also be wrapped Ah, I thought we were software engineers so started counting at 0 :) >> like emails, so 90 chars is too long. >> >> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> > > Frobbed commit while applying. > -Daniel >> >>> Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> >>> --- >>> drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++ >>> 1 file changed, 7 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c >>> index fbfe65a..b869f1c 100644 >>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c >>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c >>> @@ -875,6 +875,13 @@ static int chv_init_workarounds(struct intel_engine_cs *ring) >>> >>> static int gen9_init_workarounds(struct intel_engine_cs *ring) >>> { >>> + struct drm_device *dev = ring->dev; >>> + struct drm_i915_private *dev_priv = dev->dev_private; >>> + >>> + /* WaDisablePartialInstShootdown:skl */ >>> + WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, >>> + PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); >>> + >>> return 0; >>> } >>> >>> -- >>> 2.1.1 >>> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) 2015-02-06 9:36 ` Nick Hoath @ 2015-02-09 18:10 ` Daniel Vetter 0 siblings, 0 replies; 26+ messages in thread From: Daniel Vetter @ 2015-02-09 18:10 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx@lists.freedesktop.org On Fri, Feb 06, 2015 at 09:36:08AM +0000, Nick Hoath wrote: > On 06/02/2015 08:52, Daniel Vetter wrote: > >On Thu, Feb 05, 2015 at 05:51:46PM +0000, Damien Lespiau wrote: > >>On Thu, Feb 05, 2015 at 10:47:18AM +0000, Nick Hoath wrote: > >>>From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > >>> > >>>Add: > >>>WaDisablePartialInstShootdown > >> > >>Just an editor note: that's not really additional information compared > >>to the subject of the patch. Also subject message could be a bit more > >>direct and mention SKL: > >> > >> drm/i915/skl: Implement WaDisablePartialInstShootdown > > > >Well it's gen9 but yeah. The commit message body should explain the > >commit (e.g. more details on impact), but for w/a that's only really > >required if there's been an outside report. > So an empty body is ok if the subject has sufficient information? Yeah for hw wa there's often not more to say. Except when some details about the impact are known which are relevant (e.g. existing bug report or not wa for a feature not yet used in upstream). Generally an empty commit message is a bit thin, but just repeating the summar doesn't add value. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 04/10] drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath ` (2 preceding siblings ...) 2015-02-05 10:47 ` [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 17:55 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 05/10] drm/i915: gen 9 h/w w/a (syncing dependencies between camera and graphics) Nick Hoath ` (5 subsequent siblings) 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx Move WaDisableDgMirrorFixInHalfSliceChicken5 to gen9_init_workarounds v1: Added stepping check v2: Removed unused register bitmap Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 8 -------- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index bebefe7..2b89aac 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -63,14 +63,6 @@ static void gen9_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); - /* - * WaDisableDgMirrorFixInHalfSliceChicken5:skl - * This is a pre-production w/a. - */ - I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, - I915_READ(GEN9_HALF_SLICE_CHICKEN5) & - ~GEN9_DG_MIRROR_FIX_ENABLE); - /* Wa4x4STCOptimizationDisable:skl */ I915_WRITE(CACHE_MODE_1, _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index b869f1c..fa15cb6 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -882,6 +882,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); + if (INTEL_REVID(dev) == SKL_A0_REVID) { + /* + * WaDisableDgMirrorFixInHalfSliceChicken5:skl + * This is a pre-production w/a. + */ + I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, + I915_READ(GEN9_HALF_SLICE_CHICKEN5) & + ~GEN9_DG_MIRROR_FIX_ENABLE); + } + return 0; } -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 04/10] drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5) 2015-02-05 10:47 ` [PATCH 04/10] drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5) Nick Hoath @ 2015-02-05 17:55 ` Damien Lespiau 2015-02-05 17:57 ` Damien Lespiau 0 siblings, 1 reply; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 17:55 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:19AM +0000, Nick Hoath wrote: > Move WaDisableDgMirrorFixInHalfSliceChicken5 to gen9_init_workarounds > > v1: Added stepping check > > v2: Removed unused register bitmap > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 8 -------- > drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++ > 2 files changed, 10 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index bebefe7..2b89aac 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -63,14 +63,6 @@ static void gen9_init_clock_gating(struct drm_device *dev) > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > > - /* > - * WaDisableDgMirrorFixInHalfSliceChicken5:skl > - * This is a pre-production w/a. > - */ > - I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, > - I915_READ(GEN9_HALF_SLICE_CHICKEN5) & > - ~GEN9_DG_MIRROR_FIX_ENABLE); > - > /* Wa4x4STCOptimizationDisable:skl */ > I915_WRITE(CACHE_MODE_1, > _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index b869f1c..fa15cb6 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -882,6 +882,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, > PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); > > + if (INTEL_REVID(dev) == SKL_A0_REVID) { for SKL, I read B0 only. > + /* > + * WaDisableDgMirrorFixInHalfSliceChicken5:skl > + * This is a pre-production w/a. > + */ > + I915_WRITE(GEN9_HALF_SLICE_CHICKEN5, > + I915_READ(GEN9_HALF_SLICE_CHICKEN5) & > + ~GEN9_DG_MIRROR_FIX_ENABLE); > + } > + > return 0; > } > > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 04/10] drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5) 2015-02-05 17:55 ` Damien Lespiau @ 2015-02-05 17:57 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 17:57 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 05:55:06PM +0000, Damien Lespiau wrote: > > + if (INTEL_REVID(dev) == SKL_A0_REVID) { > > for SKL, I read B0 only. Well B0 only in the W/A db, but A0 and B0 in BSpec. I'd trust BSpec on those. -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 05/10] drm/i915: gen 9 h/w w/a (syncing dependencies between camera and graphics) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath ` (3 preceding siblings ...) 2015-02-05 10:47 ` [PATCH 04/10] drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5) Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 18:00 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 06/10] drm/i915: gen 9 h/w w/a (WaDisableSDEUnitClockGating) Nick Hoath ` (4 subsequent siblings) 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx Added: Syncing dependencies between camera and graphics v1: Added missing register bitmap Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index cd3430f9..dab4c1e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6213,6 +6213,7 @@ enum skl_disp_power_wells { #define HALF_SLICE_CHICKEN3 0xe184 #define HSW_SAMPLE_C_PERFORMANCE (1<<9) #define GEN8_CENTROID_PIXEL_OPT_DIS (1<<8) +#define GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC (1<<5) #define GEN8_SAMPLER_POWER_BYPASS_DIS (1<<1) /* Audio */ diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index fa15cb6..baeec8f 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -882,6 +882,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); + /* Syncing dependencies between camera and graphics */ + WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, + GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC); + if (INTEL_REVID(dev) == SKL_A0_REVID) { /* * WaDisableDgMirrorFixInHalfSliceChicken5:skl -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 05/10] drm/i915: gen 9 h/w w/a (syncing dependencies between camera and graphics) 2015-02-05 10:47 ` [PATCH 05/10] drm/i915: gen 9 h/w w/a (syncing dependencies between camera and graphics) Nick Hoath @ 2015-02-05 18:00 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 18:00 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:20AM +0000, Nick Hoath wrote: > Added: > Syncing dependencies between camera and graphics > > v1: Added missing register bitmap > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> For the record, this W/A has no name nor documentation. So well... Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> -- Damien > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++++ > 2 files changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index cd3430f9..dab4c1e 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6213,6 +6213,7 @@ enum skl_disp_power_wells { > #define HALF_SLICE_CHICKEN3 0xe184 > #define HSW_SAMPLE_C_PERFORMANCE (1<<9) > #define GEN8_CENTROID_PIXEL_OPT_DIS (1<<8) > +#define GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC (1<<5) > #define GEN8_SAMPLER_POWER_BYPASS_DIS (1<<1) > > /* Audio */ > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index fa15cb6..baeec8f 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -882,6 +882,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, > PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE); > > + /* Syncing dependencies between camera and graphics */ > + WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, > + GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC); > + > if (INTEL_REVID(dev) == SKL_A0_REVID) { > /* > * WaDisableDgMirrorFixInHalfSliceChicken5:skl > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 06/10] drm/i915: gen 9 h/w w/a (WaDisableSDEUnitClockGating) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath ` (4 preceding siblings ...) 2015-02-05 10:47 ` [PATCH 05/10] drm/i915: gen 9 h/w w/a (syncing dependencies between camera and graphics) Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 18:01 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 07/10] drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7) Nick Hoath ` (3 subsequent siblings) 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx From: "Hoath, Nicholas" <nicholas.hoath@intel.com> Add stepping check for WaDisableSDEUnitClockGating. Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 2b89aac..06d67fd 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -56,12 +56,14 @@ static void gen9_init_clock_gating(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - /* - * WaDisableSDEUnitClockGating:skl - * This seems to be a pre-production w/a. - */ - I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | - GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + if (INTEL_REVID(dev) == SKL_A0_REVID) { + /* + * WaDisableSDEUnitClockGating:skl + * This seems to be a pre-production w/a. + */ + I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | + GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + } /* Wa4x4STCOptimizationDisable:skl */ I915_WRITE(CACHE_MODE_1, -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 06/10] drm/i915: gen 9 h/w w/a (WaDisableSDEUnitClockGating) 2015-02-05 10:47 ` [PATCH 06/10] drm/i915: gen 9 h/w w/a (WaDisableSDEUnitClockGating) Nick Hoath @ 2015-02-05 18:01 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 18:01 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:21AM +0000, Nick Hoath wrote: > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > Add stepping check for WaDisableSDEUnitClockGating. > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> -- Damien > --- > drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++------ > 1 file changed, 8 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 2b89aac..06d67fd 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -56,12 +56,14 @@ static void gen9_init_clock_gating(struct drm_device *dev) > { > struct drm_i915_private *dev_priv = dev->dev_private; > > - /* > - * WaDisableSDEUnitClockGating:skl > - * This seems to be a pre-production w/a. > - */ > - I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > - GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > + if (INTEL_REVID(dev) == SKL_A0_REVID) { > + /* > + * WaDisableSDEUnitClockGating:skl > + * This seems to be a pre-production w/a. > + */ > + I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > + GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > + } > > /* Wa4x4STCOptimizationDisable:skl */ > I915_WRITE(CACHE_MODE_1, > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 07/10] drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath ` (5 preceding siblings ...) 2015-02-05 10:47 ` [PATCH 06/10] drm/i915: gen 9 h/w w/a (WaDisableSDEUnitClockGating) Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 18:04 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 08/10] drm/i915: gen 9 h/w w/a (Wa4x4STCOptimizationDisable) Nick Hoath ` (2 subsequent siblings) 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx Move WaEnableYV12BugFixInHalfSliceChicken7 to gen9_init_workarounds v1: Add stepping check. Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index dab4c1e..4ee1964 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6216,6 +6216,9 @@ enum skl_disp_power_wells { #define GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC (1<<5) #define GEN8_SAMPLER_POWER_BYPASS_DIS (1<<1) +#define GEN9_HALF_SLICE_CHICKEN7 0xe194 +#define GEN9_ENABLE_YV12_BUGFIX (1<<4) + /* Audio */ #define G4X_AUD_VID_DID (dev_priv->info.display_mmio_offset + 0x62020) #define INTEL_AUDIO_DEVCL 0x808629FB diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index baeec8f..884f319 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -896,6 +896,12 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) ~GEN9_DG_MIRROR_FIX_ENABLE); } + if (INTEL_REVID(dev) >= SKL_C0_REVID) { + /* WaEnableYV12BugFixInHalfSliceChicken7:skl */ + WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7, + GEN9_ENABLE_YV12_BUGFIX); + } + return 0; } -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 07/10] drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7) 2015-02-05 10:47 ` [PATCH 07/10] drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7) Nick Hoath @ 2015-02-05 18:04 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 18:04 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:22AM +0000, Nick Hoath wrote: > Move WaEnableYV12BugFixInHalfSliceChicken7 to gen9_init_workarounds > > v1: Add stepping check. > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++++ > 2 files changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index dab4c1e..4ee1964 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6216,6 +6216,9 @@ enum skl_disp_power_wells { > #define GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC (1<<5) > #define GEN8_SAMPLER_POWER_BYPASS_DIS (1<<1) > > +#define GEN9_HALF_SLICE_CHICKEN7 0xe194 > +#define GEN9_ENABLE_YV12_BUGFIX (1<<4) > + > /* Audio */ > #define G4X_AUD_VID_DID (dev_priv->info.display_mmio_offset + 0x62020) > #define INTEL_AUDIO_DEVCL 0x808629FB > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index baeec8f..884f319 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -896,6 +896,12 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > ~GEN9_DG_MIRROR_FIX_ENABLE); > } > > + if (INTEL_REVID(dev) >= SKL_C0_REVID) { > + /* WaEnableYV12BugFixInHalfSliceChicken7:skl */ > + WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7, > + GEN9_ENABLE_YV12_BUGFIX); > + } > + > return 0; > } > > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 08/10] drm/i915: gen 9 h/w w/a (Wa4x4STCOptimizationDisable) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath ` (6 preceding siblings ...) 2015-02-05 10:47 ` [PATCH 07/10] drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7) Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 18:05 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 09/10] drm/i915: gen 9 h/w w/a (WaForceEnableNonCoherent) Nick Hoath 2015-02-05 10:47 ` [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) Nick Hoath 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx From: "Hoath, Nicholas" <nicholas.hoath@intel.com> Move Wa4x4STCOptimizationDisable to gen9_init_workarounds v1: rebase Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 4 ---- drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++ 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 06d67fd..30071ff 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -64,10 +64,6 @@ static void gen9_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); } - - /* Wa4x4STCOptimizationDisable:skl */ - I915_WRITE(CACHE_MODE_1, - _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); } static void i915_pineview_get_mem_freq(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 884f319..066b63d 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -902,6 +902,9 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) GEN9_ENABLE_YV12_BUGFIX); } + /* Wa4x4STCOptimizationDisable:skl */ + WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE); + return 0; } -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 08/10] drm/i915: gen 9 h/w w/a (Wa4x4STCOptimizationDisable) 2015-02-05 10:47 ` [PATCH 08/10] drm/i915: gen 9 h/w w/a (Wa4x4STCOptimizationDisable) Nick Hoath @ 2015-02-05 18:05 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 18:05 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:23AM +0000, Nick Hoath wrote: > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > Move Wa4x4STCOptimizationDisable to gen9_init_workarounds > > v1: rebase > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> -- Damien > --- > drivers/gpu/drm/i915/intel_pm.c | 4 ---- > drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++ > 2 files changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 06d67fd..30071ff 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -64,10 +64,6 @@ static void gen9_init_clock_gating(struct drm_device *dev) > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > } > - > - /* Wa4x4STCOptimizationDisable:skl */ > - I915_WRITE(CACHE_MODE_1, > - _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); > } > > static void i915_pineview_get_mem_freq(struct drm_device *dev) > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 884f319..066b63d 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -902,6 +902,9 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > GEN9_ENABLE_YV12_BUGFIX); > } > > + /* Wa4x4STCOptimizationDisable:skl */ > + WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE); > + > return 0; > } > > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 09/10] drm/i915: gen 9 h/w w/a (WaForceEnableNonCoherent) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath ` (7 preceding siblings ...) 2015-02-05 10:47 ` [PATCH 08/10] drm/i915: gen 9 h/w w/a (Wa4x4STCOptimizationDisable) Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 18:10 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) Nick Hoath 9 siblings, 1 reply; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx From: "Hoath, Nicholas" <nicholas.hoath@intel.com> Add: WaForceEnableNonCoherent v1: Don't add WaHdcDisableFetchWhenMasked. Add stepping check for WaForceEnableNonCoherent Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_ringbuffer.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 066b63d..36885b4 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -902,6 +902,17 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) GEN9_ENABLE_YV12_BUGFIX); } + if (INTEL_REVID(dev) <= SKL_D0_REVID) { + /* + *Use Force Non-Coherent whenever executing a 3D context. This + * is a workaround for a possible hang in the unlikely event + * a TLB invalidation occurs during a PSD flush. + */ + /* WaForceEnableNonCoherent:skl */ + WA_SET_BIT_MASKED(HDC_CHICKEN0, + HDC_FORCE_NON_COHERENT); + } + /* Wa4x4STCOptimizationDisable:skl */ WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE); -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 09/10] drm/i915: gen 9 h/w w/a (WaForceEnableNonCoherent) 2015-02-05 10:47 ` [PATCH 09/10] drm/i915: gen 9 h/w w/a (WaForceEnableNonCoherent) Nick Hoath @ 2015-02-05 18:10 ` Damien Lespiau 0 siblings, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 18:10 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:24AM +0000, Nick Hoath wrote: > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > Add: > WaForceEnableNonCoherent > > v1: Don't add WaHdcDisableFetchWhenMasked. Add stepping check for WaForceEnableNonCoherent > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> -- Damien > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 066b63d..36885b4 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -902,6 +902,17 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) > GEN9_ENABLE_YV12_BUGFIX); > } > > + if (INTEL_REVID(dev) <= SKL_D0_REVID) { > + /* > + *Use Force Non-Coherent whenever executing a 3D context. This > + * is a workaround for a possible hang in the unlikely event > + * a TLB invalidation occurs during a PSD flush. > + */ > + /* WaForceEnableNonCoherent:skl */ > + WA_SET_BIT_MASKED(HDC_CHICKEN0, > + HDC_FORCE_NON_COHERENT); > + } > + > /* Wa4x4STCOptimizationDisable:skl */ > WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE); > > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath ` (8 preceding siblings ...) 2015-02-05 10:47 ` [PATCH 09/10] drm/i915: gen 9 h/w w/a (WaForceEnableNonCoherent) Nick Hoath @ 2015-02-05 10:47 ` Nick Hoath 2015-02-05 17:27 ` shuang.he 2015-02-05 18:17 ` Damien Lespiau 9 siblings, 2 replies; 26+ messages in thread From: Nick Hoath @ 2015-02-05 10:47 UTC (permalink / raw) To: intel-gfx From: "Hoath, Nicholas" <nicholas.hoath@intel.com> Add: WaEnableForceRestoreInCtxtDescForVCS v1: Add stepping check. Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> --- drivers/gpu/drm/i915/intel_lrc.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index a94346f..cb7214f 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -254,8 +254,10 @@ u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj) return lrca >> 12; } -static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj) +static uint64_t execlists_ctx_descriptor(struct intel_engine_cs *ring, + struct drm_i915_gem_object *ctx_obj) { + struct drm_device *dev = ring->dev; uint64_t desc; uint64_t lrca = i915_gem_obj_ggtt_offset(ctx_obj); @@ -272,6 +274,13 @@ static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj) * signalling between Command Streamers */ /* desc |= GEN8_CTX_FORCE_RESTORE; */ + /* WaEnableForceRestoreInCtxtDescForVCS:skl */ + if (IS_GEN9(dev) && + INTEL_REVID(dev) >= SKL_B0_REVID && + (ring->id == BCS || ring->id == VCS || + ring->id == VECS || ring->id == VCS2)) + desc |= GEN8_CTX_FORCE_RESTORE; + return desc; } @@ -286,13 +295,13 @@ static void execlists_elsp_write(struct intel_engine_cs *ring, /* XXX: You must always write both descriptors in the order below. */ if (ctx_obj1) - temp = execlists_ctx_descriptor(ctx_obj1); + temp = execlists_ctx_descriptor(ring, ctx_obj1); else temp = 0; desc[1] = (u32)(temp >> 32); desc[0] = (u32)temp; - temp = execlists_ctx_descriptor(ctx_obj0); + temp = execlists_ctx_descriptor(ring, ctx_obj0); desc[3] = (u32)(temp >> 32); desc[2] = (u32)temp; -- 2.1.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) 2015-02-05 10:47 ` [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) Nick Hoath @ 2015-02-05 17:27 ` shuang.he 2015-02-05 18:17 ` Damien Lespiau 1 sibling, 0 replies; 26+ messages in thread From: shuang.he @ 2015-02-05 17:27 UTC (permalink / raw) To: shuang.he, ethan.gao, intel-gfx, nicholas.hoath Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) Task id: 5717 -------------------------------------Summary------------------------------------- Platform Delta drm-intel-nightly Series Applied PNV 282/283 282/283 ILK +1 316/319 317/319 SNB +22-4 322/346 340/346 IVB -3 382/384 379/384 BYT 296/296 296/296 HSW -1 425/428 424/428 BDW 318/333 318/333 -------------------------------------Detailed------------------------------------- Platform Test drm-intel-nightly Series Applied *ILK igt_drv_suspend_forcewake DMESG_WARN(3, M26) PASS(1, M26) SNB igt_kms_cursor_crc_cursor-size-change NSPT(2, M22M35)PASS(2, M35)DMESG_FAIL(1, M35) PASS(1, M35) SNB igt_kms_flip_dpms-vs-vblank-race DMESG_WARN(1, M35)PASS(1, M22) DMESG_WARN(1, M35) SNB igt_kms_flip_dpms-vs-vblank-race-interruptible DMESG_WARN(2, M35)PASS(3, M22M35) DMESG_WARN(1, M35) SNB igt_kms_flip_event_leak NSPT(2, M22M35)PASS(3, M35) PASS(1, M35) SNB igt_kms_flip_modeset-vs-vblank-race DMESG_WARN(1, M35)PASS(2, M22M35) DMESG_WARN(1, M35) SNB igt_kms_flip_modeset-vs-vblank-race-interruptible DMESG_WARN(1, M35)PASS(2, M22M35) DMESG_WARN(1, M35) SNB igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_kms_rotation_crc_primary-rotation NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_kms_rotation_crc_sprite-rotation NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_cursor NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_cursor-dpms NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_dpms-mode-unset-non-lpsp NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_dpms-non-lpsp NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_drm-resources-equal NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_fences NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_fences-dpms NSPT(1, M22)DMESG_WARN(1, M35)PASS(2, M35) PASS(1, M35) SNB igt_pm_rpm_gem-execbuf NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_gem-mmap-cpu NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_gem-mmap-gtt NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_gem-pread NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_i2c NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_modeset-non-lpsp NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_modeset-non-lpsp-stress-no-wait NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_pci-d3-state NSPT(1, M22)PASS(3, M35) PASS(1, M35) SNB igt_pm_rpm_rte NSPT(1, M22)PASS(3, M35) PASS(1, M35) IVB igt_gem_pwrite_pread_snooped-copy-performance DMESG_WARN(1, M34)PASS(2, M21M34) DMESG_WARN(1, M34) IVB igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance DMESG_WARN(2, M34)PASS(4, M21M34) DMESG_WARN(1, M34) IVB igt_gem_storedw_batches_loop_secure-dispatch DMESG_WARN(1, M34)PASS(4, M21M34M4) DMESG_WARN(1, M34) *HSW igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance PASS(3, M20) DMESG_WARN(1, M20) Note: You need to pay more attention to line start with '*' _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) 2015-02-05 10:47 ` [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) Nick Hoath 2015-02-05 17:27 ` shuang.he @ 2015-02-05 18:17 ` Damien Lespiau 1 sibling, 0 replies; 26+ messages in thread From: Damien Lespiau @ 2015-02-05 18:17 UTC (permalink / raw) To: Nick Hoath; +Cc: intel-gfx On Thu, Feb 05, 2015 at 10:47:25AM +0000, Nick Hoath wrote: > From: "Hoath, Nicholas" <nicholas.hoath@intel.com> > > Add: > WaEnableForceRestoreInCtxtDescForVCS > > v1: Add stepping check. > > Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> > --- > drivers/gpu/drm/i915/intel_lrc.c | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > index a94346f..cb7214f 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -254,8 +254,10 @@ u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj) > return lrca >> 12; > } > > -static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj) > +static uint64_t execlists_ctx_descriptor(struct intel_engine_cs *ring, > + struct drm_i915_gem_object *ctx_obj) > { > + struct drm_device *dev = ring->dev; > uint64_t desc; > uint64_t lrca = i915_gem_obj_ggtt_offset(ctx_obj); > > @@ -272,6 +274,13 @@ static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj) > * signalling between Command Streamers */ > /* desc |= GEN8_CTX_FORCE_RESTORE; */ > > + /* WaEnableForceRestoreInCtxtDescForVCS:skl */ > + if (IS_GEN9(dev) && > + INTEL_REVID(dev) >= SKL_B0_REVID && Shouldn't it be <= SKL_B0_REVID? > + (ring->id == BCS || ring->id == VCS || > + ring->id == VECS || ring->id == VCS2)) Usually, we indent with the opening brace. > + desc |= GEN8_CTX_FORCE_RESTORE; > + > return desc; > } > > @@ -286,13 +295,13 @@ static void execlists_elsp_write(struct intel_engine_cs *ring, > > /* XXX: You must always write both descriptors in the order below. */ > if (ctx_obj1) > - temp = execlists_ctx_descriptor(ctx_obj1); > + temp = execlists_ctx_descriptor(ring, ctx_obj1); > else > temp = 0; > desc[1] = (u32)(temp >> 32); > desc[0] = (u32)temp; > > - temp = execlists_ctx_descriptor(ctx_obj0); > + temp = execlists_ctx_descriptor(ring, ctx_obj0); > desc[3] = (u32)(temp >> 32); > desc[2] = (u32)temp; > > -- > 2.1.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 26+ messages in thread
end of thread, other threads:[~2015-02-09 18:09 UTC | newest] Thread overview: 26+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-02-05 10:47 [PATCH 00/10] drm/i915: HardWare WorkArounds for gen 9 Nick Hoath 2015-02-05 10:47 ` [PATCH 01/10] drm/i915: ring w/a initialisation " Nick Hoath 2015-02-05 17:39 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 02/10] drm/i915: ring w/a gen 9 revision definitions Nick Hoath 2015-02-05 17:46 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 03/10] drm/i915: gen 9 h/w w/a (WaDisablePartialInstShootdown) Nick Hoath 2015-02-05 17:51 ` Damien Lespiau 2015-02-06 8:52 ` Daniel Vetter 2015-02-06 9:36 ` Nick Hoath 2015-02-09 18:10 ` Daniel Vetter 2015-02-05 10:47 ` [PATCH 04/10] drm/i915: gen 9 h/w w/a (WaDisableDgMirrorFixInHalfSliceChicken5) Nick Hoath 2015-02-05 17:55 ` Damien Lespiau 2015-02-05 17:57 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 05/10] drm/i915: gen 9 h/w w/a (syncing dependencies between camera and graphics) Nick Hoath 2015-02-05 18:00 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 06/10] drm/i915: gen 9 h/w w/a (WaDisableSDEUnitClockGating) Nick Hoath 2015-02-05 18:01 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 07/10] drm/i915: gen 9 h/w w/a (WaEnableYV12BugFixInHalfSliceChicken7) Nick Hoath 2015-02-05 18:04 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 08/10] drm/i915: gen 9 h/w w/a (Wa4x4STCOptimizationDisable) Nick Hoath 2015-02-05 18:05 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 09/10] drm/i915: gen 9 h/w w/a (WaForceEnableNonCoherent) Nick Hoath 2015-02-05 18:10 ` Damien Lespiau 2015-02-05 10:47 ` [PATCH 10/10] drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS) Nick Hoath 2015-02-05 17:27 ` shuang.he 2015-02-05 18:17 ` Damien Lespiau
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