* [PATCH v2] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
@ 2015-02-09 19:25 Damien Lespiau
2015-02-09 21:14 ` Chris Wilson
0 siblings, 1 reply; 5+ messages in thread
From: Damien Lespiau @ 2015-02-09 19:25 UTC (permalink / raw)
To: intel-gfx
v2: Reorder defines (Ben)
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 5 +++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b4abd50..4b8450d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5273,10 +5273,11 @@ enum skl_disp_power_wells {
/* GEN8 chicken */
#define HDC_CHICKEN0 0x7300
-#define HDC_FORCE_NON_COHERENT (1<<4)
-#define HDC_DONOT_FETCH_MEM_WHEN_MASKED (1<<11)
#define HDC_FENCE_DEST_SLM_DISABLE (1<<14)
+#define HDC_DONOT_FETCH_MEM_WHEN_MASKED (1<<11)
#define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10)
+#define HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT (1<<5)
+#define HDC_FORCE_NON_COHERENT (1<<4)
/* WaCatErrorRejectionIssue */
#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 46486a5..a9cde64 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -790,9 +790,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
*/
/* WaForceEnableNonCoherent:bdw */
/* WaHdcDisableFetchWhenMasked:bdw */
+ /* WaForceContextSaveRestoreNonCoherent:bdw */
/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
WA_SET_BIT_MASKED(HDC_CHICKEN0,
HDC_FORCE_NON_COHERENT |
+ HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
HDC_DONOT_FETCH_MEM_WHEN_MASKED |
(IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
--
1.8.3.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v2] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
2015-02-09 19:25 [PATCH v2] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent Damien Lespiau
@ 2015-02-09 21:14 ` Chris Wilson
2015-02-10 10:31 ` [PATCH v3] " Damien Lespiau
2015-02-10 10:31 ` [PATCH v2] " Damien Lespiau
0 siblings, 2 replies; 5+ messages in thread
From: Chris Wilson @ 2015-02-09 21:14 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On Mon, Feb 09, 2015 at 07:25:56PM +0000, Damien Lespiau wrote:
> v2: Reorder defines (Ben)
Bikeshed time?
> /* WaCatErrorRejectionIssue */
> #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 46486a5..a9cde64 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -790,9 +790,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
> */
> /* WaForceEnableNonCoherent:bdw */
> /* WaHdcDisableFetchWhenMasked:bdw */
> + /* WaForceContextSaveRestoreNonCoherent:bdw */
> /* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
> WA_SET_BIT_MASKED(HDC_CHICKEN0,
> HDC_FORCE_NON_COHERENT |
> + HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
> HDC_DONOT_FETCH_MEM_WHEN_MASKED |
> (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
This is nicer as:
WA_SET_BIT_MASKED(HDC_CHICKEN0,
/* WaForceEnableNonCoherent:bdw */
HDC_FORCE_NON_COHERENT |
+ /* WaForceContextSaveRestoreNonCoherent:bdw */
+ HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
/* WaHdcDisableFetchWhenMasked:bdw */
HDC_DONOT_FETCH_MEM_WHEN_MASKED |
/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
(IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
Indeed, that shows that you misorded your comment! ;-)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
2015-02-09 21:14 ` Chris Wilson
@ 2015-02-10 10:31 ` Damien Lespiau
2015-02-10 11:57 ` Daniel Vetter
2015-02-10 10:31 ` [PATCH v2] " Damien Lespiau
1 sibling, 1 reply; 5+ messages in thread
From: Damien Lespiau @ 2015-02-10 10:31 UTC (permalink / raw)
To: intel-gfx
v2: Reorder defines (Ben)
v3: More bikesheds, this time re-ordering comments! (Chris)
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 5 +++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +++++---
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b4abd50..4b8450d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5273,10 +5273,11 @@ enum skl_disp_power_wells {
/* GEN8 chicken */
#define HDC_CHICKEN0 0x7300
-#define HDC_FORCE_NON_COHERENT (1<<4)
-#define HDC_DONOT_FETCH_MEM_WHEN_MASKED (1<<11)
#define HDC_FENCE_DEST_SLM_DISABLE (1<<14)
+#define HDC_DONOT_FETCH_MEM_WHEN_MASKED (1<<11)
#define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10)
+#define HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT (1<<5)
+#define HDC_FORCE_NON_COHERENT (1<<4)
/* WaCatErrorRejectionIssue */
#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 93365fe..443e19c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -788,12 +788,14 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
* workaround for for a possible hang in the unlikely event a TLB
* invalidation occurs during a PSD flush.
*/
- /* WaForceEnableNonCoherent:bdw */
- /* WaHdcDisableFetchWhenMasked:bdw */
- /* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
WA_SET_BIT_MASKED(HDC_CHICKEN0,
+ /* WaForceEnableNonCoherent:bdw */
HDC_FORCE_NON_COHERENT |
+ /* WaForceContextSaveRestoreNonCoherent:bdw */
+ HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
+ /* WaHdcDisableFetchWhenMasked:bdw */
HDC_DONOT_FETCH_MEM_WHEN_MASKED |
+ /* WaDisableFenceDestinationToSLM:bdw (pre-prod) */
(IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
/* From the Haswell PRM, Command Reference: Registers, CACHE_MODE_0:
--
1.8.3.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v3] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
2015-02-10 10:31 ` [PATCH v3] " Damien Lespiau
@ 2015-02-10 11:57 ` Daniel Vetter
0 siblings, 0 replies; 5+ messages in thread
From: Daniel Vetter @ 2015-02-10 11:57 UTC (permalink / raw)
To: Damien Lespiau; +Cc: intel-gfx
On Tue, Feb 10, 2015 at 10:31:00AM +0000, Damien Lespiau wrote:
> v2: Reorder defines (Ben)
> v3: More bikesheds, this time re-ordering comments! (Chris)
>
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_reg.h | 5 +++--
> drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +++++---
> 2 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index b4abd50..4b8450d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5273,10 +5273,11 @@ enum skl_disp_power_wells {
>
> /* GEN8 chicken */
> #define HDC_CHICKEN0 0x7300
> -#define HDC_FORCE_NON_COHERENT (1<<4)
> -#define HDC_DONOT_FETCH_MEM_WHEN_MASKED (1<<11)
> #define HDC_FENCE_DEST_SLM_DISABLE (1<<14)
> +#define HDC_DONOT_FETCH_MEM_WHEN_MASKED (1<<11)
> #define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10)
> +#define HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT (1<<5)
> +#define HDC_FORCE_NON_COHERENT (1<<4)
>
> /* WaCatErrorRejectionIssue */
> #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 93365fe..443e19c 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -788,12 +788,14 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
> * workaround for for a possible hang in the unlikely event a TLB
> * invalidation occurs during a PSD flush.
> */
> - /* WaForceEnableNonCoherent:bdw */
> - /* WaHdcDisableFetchWhenMasked:bdw */
> - /* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
> WA_SET_BIT_MASKED(HDC_CHICKEN0,
> + /* WaForceEnableNonCoherent:bdw */
> HDC_FORCE_NON_COHERENT |
> + /* WaForceContextSaveRestoreNonCoherent:bdw */
> + HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
> + /* WaHdcDisableFetchWhenMasked:bdw */
> HDC_DONOT_FETCH_MEM_WHEN_MASKED |
> + /* WaDisableFenceDestinationToSLM:bdw (pre-prod) */
> (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
>
> /* From the Haswell PRM, Command Reference: Registers, CACHE_MODE_0:
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
2015-02-09 21:14 ` Chris Wilson
2015-02-10 10:31 ` [PATCH v3] " Damien Lespiau
@ 2015-02-10 10:31 ` Damien Lespiau
1 sibling, 0 replies; 5+ messages in thread
From: Damien Lespiau @ 2015-02-10 10:31 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Mon, Feb 09, 2015 at 09:14:26PM +0000, Chris Wilson wrote:
> On Mon, Feb 09, 2015 at 07:25:56PM +0000, Damien Lespiau wrote:
> > v2: Reorder defines (Ben)
>
> Bikeshed time?
Oh no, why did I give in the first time? now I'm being bullied!
> > /* WaCatErrorRejectionIssue */
> > #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 46486a5..a9cde64 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -790,9 +790,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
> > */
> > /* WaForceEnableNonCoherent:bdw */
> > /* WaHdcDisableFetchWhenMasked:bdw */
> > + /* WaForceContextSaveRestoreNonCoherent:bdw */
> > /* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
> > WA_SET_BIT_MASKED(HDC_CHICKEN0,
> > HDC_FORCE_NON_COHERENT |
> > + HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
> > HDC_DONOT_FETCH_MEM_WHEN_MASKED |
> > (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
>
> This is nicer as:
> WA_SET_BIT_MASKED(HDC_CHICKEN0,
> /* WaForceEnableNonCoherent:bdw */
> HDC_FORCE_NON_COHERENT |
> + /* WaForceContextSaveRestoreNonCoherent:bdw */
> + HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
> /* WaHdcDisableFetchWhenMasked:bdw */
> HDC_DONOT_FETCH_MEM_WHEN_MASKED |
> /* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
> (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
>
> Indeed, that shows that you misorded your comment! ;-)
Ah, but there is a line over 80 characters there! not acceptable!
--
Damien
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^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-02-10 11:56 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2015-02-09 19:25 [PATCH v2] drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent Damien Lespiau
2015-02-09 21:14 ` Chris Wilson
2015-02-10 10:31 ` [PATCH v3] " Damien Lespiau
2015-02-10 11:57 ` Daniel Vetter
2015-02-10 10:31 ` [PATCH v2] " Damien Lespiau
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