Re: [PATCH 12/18] drm/i915/skl: Implement WaDisablePowerCompilerClockGating

From: Damien Lespiau <damien.lespiau@intel.com>
To: Nick Hoath <nicholas.hoath@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 12/18] drm/i915/skl: Implement WaDisablePowerCompilerClockGating
Date: Wed, 11 Feb 2015 17:48:42 +0000	[thread overview]
Message-ID: <20150211174842.GC8118@strange.ger.corp.intel.com> (raw)
In-Reply-To: <54DB756F.5060008@intel.com>

On Wed, Feb 11, 2015 at 03:29:51PM +0000, Nick Hoath wrote:
> On 09/02/2015 19:33, Damien Lespiau wrote:
> >Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> >---
> >  drivers/gpu/drm/i915/i915_reg.h         | 5 +++--
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++++++
> >  2 files changed, 11 insertions(+), 2 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> >index a457c28..fdfbdb3 100644
> >--- a/drivers/gpu/drm/i915/i915_reg.h
> >+++ b/drivers/gpu/drm/i915/i915_reg.h
> >@@ -5241,8 +5241,9 @@ enum skl_disp_power_wells {
> >  #define COMMON_SLICE_CHICKEN2			0x7014
> >  # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE	(1<<0)
> >
> >-#define HIZ_CHICKEN				0x7018
> >-# define CHV_HZ_8X8_MODE_IN_1X			(1<<15)
> >+#define HIZ_CHICKEN					0x7018
> >+# define CHV_HZ_8X8_MODE_IN_1X				(1<<15)
> >+# define BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE	(1<<3)
> >
> >  #define GEN9_SLICE_COMMON_ECO_CHICKEN0		0x7308
> >  #define  DISABLE_PIXEL_MASK_CAMMING		(1<<14)
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >index 27d101c..3135192 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >@@ -930,8 +930,16 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> >
> >  static int skl_init_workarounds(struct intel_engine_cs *ring)
> >  {
> >+	struct drm_device *dev = ring->dev;
> >+	struct drm_i915_private *dev_priv = dev->dev_private;
> >+
> >  	gen9_init_workarounds(ring);
> >
> >+	/* WaDisablePowerCompilerClockGating:skl */
> >+	if (INTEL_REVID(dev) == SKL_REVID_B0)
> 
> Should this be <= ?

Nop, both specs (SKL:GT2:B) and the wa db (SIWA_ONLY_SKL_B0) state
firmly B0 only.

-- 
Damien
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