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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/7] drm/i915/skl: Allow scanning out Y and Yf fbs
Date: Wed, 25 Feb 2015 13:32:11 +0200	[thread overview]
Message-ID: <20150225113211.GU11371@intel.com> (raw)
In-Reply-To: <54EDA5B6.8040307@linux.intel.com>

On Wed, Feb 25, 2015 at 10:36:38AM +0000, Tvrtko Ursulin wrote:
> 
> On 02/24/2015 05:36 PM, Ville Syrjälä wrote:
> > On Mon, Feb 23, 2015 at 03:55:56PM +0000, Tvrtko Ursulin wrote:
> >> From: Damien Lespiau <damien.lespiau@intel.com>
> >>
> >> Skylake is able to scannout those tiling formats. We need to allow them
> >> in the ADDFB ioctl and tell the harware about it.
> >>
> >> v2: Rebased for addfb2 interface. (Tvrtko Ursulin)
> >> v3: Rebased for fb modifier changes. (Tvrtko Ursulin)
> >> v4: Don't allow Y tiled fbs just yet. (Tvrtko Ursulin)
> >> v5: Check for stride alignment and max pitch. (Tvrtko Ursulin)
> >> v6: Simplify maximum pitch check. (Ville Syrjälä)
> >> v7: Drop the gen9 check since requirements are no different. (Ville Syrjälä)
> >>
> >> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> >> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/intel_display.c | 115 ++++++++++++++++++++++++-----------
> >>   drivers/gpu/drm/i915/intel_drv.h     |   2 +
> >>   drivers/gpu/drm/i915/intel_sprite.c  |  18 ++++--
> >>   3 files changed, 95 insertions(+), 40 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index 6e70748..a523d84 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -2728,6 +2728,34 @@ static void ironlake_update_primary_plane(struct drm_crtc *crtc,
> >>   	POSTING_READ(reg);
> >>   }
> >>
> >> +u32 intel_fb_stride_alignment(struct drm_device *dev, uint64_t fb_modifier,
> >> +			      uint32_t pixel_format)
> >> +{
> >> +	u32 bits_per_pixel = drm_format_plane_cpp(pixel_format, 0) * 8;
> >> +
> >> +	/*
> >> +	 * The stride is either expressed as a multiple of 64 bytes
> >> +	 * chunks for linear buffers or in number of tiles for tiled
> >> +	 * buffers.
> >> +	 */
> >> +	switch (fb_modifier) {
> >> +	case DRM_FORMAT_MOD_NONE:
> >> +		return 64;
> >> +	case I915_FORMAT_MOD_X_TILED:
> >
> > if (gen2)
> > 	return 128;
> 
> Okay I'll add it blindly, but again, I failed to find this in existing code.

i915_tiling_ok()

> 
> >> +		return 512;
> >> +	case I915_FORMAT_MOD_Y_TILED:
> >> +		return 128;
> >
> > In theory we could check gen2 and HAS_128_BYTE_Y_TILING() here, but
> > since old platforms didn't do Y tiled scanout anyway that's not really
> > needed. But maybe toss in a comment about that so that people don't
> > start wondering why this doesn't care about that stuff?
> 
> Will do.
> 
> Regards,
> 
> Tvrtko

-- 
Ville Syrjälä
Intel OTC
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  reply	other threads:[~2015-02-25 11:32 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-23 15:55 [PATCH 0/7] Skylake Y tiled scanout Tvrtko Ursulin
2015-02-23 15:55 ` [PATCH 1/7] drm/i915/skl: Add new displayable tiling formats Tvrtko Ursulin
2015-02-23 15:55 ` [PATCH 2/7] drm/i915/skl: Allow scanning out Y and Yf fbs Tvrtko Ursulin
2015-02-24 16:38   ` Damien Lespiau
2015-02-24 17:36   ` Ville Syrjälä
2015-02-25 10:36     ` Tvrtko Ursulin
2015-02-25 11:32       ` Ville Syrjälä [this message]
2015-02-23 15:55 ` [PATCH 3/7] drm/i915/skl: Adjust intel_fb_align_height() for Yb/Yf tiling Tvrtko Ursulin
2015-02-24 16:54   ` Damien Lespiau
2015-02-25 10:54     ` Tvrtko Ursulin
2015-02-25 14:00       ` Damien Lespiau
2015-02-25 15:20         ` Damien Lespiau
2015-02-23 15:55 ` [PATCH 4/7] drm/i915/skl: Teach pin_and_fence_fb_obj() about Y tiling constraints Tvrtko Ursulin
2015-02-23 15:55 ` [PATCH 5/7] drm/i915/skl: Adjust get_plane_config() to support Yb/Yf tiling Tvrtko Ursulin
2015-02-24 17:26   ` Damien Lespiau
2015-02-25 10:38     ` Tvrtko Ursulin
2015-02-23 15:56 ` [PATCH 6/7] drm/i915/skl: Update watermarks for Y tiling Tvrtko Ursulin
2015-02-24 19:26   ` Damien Lespiau
2015-02-25 10:34     ` Tvrtko Ursulin
2015-02-25 14:08       ` Damien Lespiau
2015-02-24 21:42   ` Daniel Vetter
2015-02-25 10:50     ` Tvrtko Ursulin
2015-02-25 14:27       ` Damien Lespiau
2015-02-25 15:03       ` Daniel Vetter
2015-02-23 15:56 ` [PATCH 7/7] drm/i915/skl: Allow Y (and Yf) frame buffer creation Tvrtko Ursulin
2015-02-24 19:30   ` Damien Lespiau
2015-02-24 21:46   ` Daniel Vetter
2015-02-25 10:51     ` Tvrtko Ursulin
2015-02-25  6:08   ` shuang.he
2015-02-24 19:06 ` [PATCH 0/7] Skylake Y tiled scanout Damien Lespiau

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