From: Daniel Vetter <daniel@ffwll.ch>
To: akash goel <akash.goels@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 05/12] drm/i915/bdw: implement alloc/free for 4lvl
Date: Wed, 4 Mar 2015 14:00:53 +0100 [thread overview]
Message-ID: <20150304130053.GR18775@phenom.ffwll.local> (raw)
In-Reply-To: <CAK_0AV2SG+PN-yxOQBQp392C9umoAnP3Bs0sgyPRy-y6w4=Rhw@mail.gmail.com>
On Tue, Mar 03, 2015 at 06:25:27PM +0530, akash goel wrote:
> On Fri, Feb 20, 2015 at 11:15 PM, Michel Thierry
> > + pdp = ppgtt->pml4.pdps[i];
> > + if (!pdp->daddr)
> > + pci_unmap_page(hwdev, pdp->daddr, PAGE_SIZE,
> > + PCI_DMA_BIDIRECTIONAL);
> > +
>
> For consistency & cleanup, the call to pci_unmap_page can be replaced
> with i915_dma_unmap_single.
> Same can be done inside the gen8_ppgtt_unmap_pages_3lvl function also.
Everything but the dma api interfaces (dma_unmap_page) is deprecated. A
follow-up patch to go through all the i915 code and do these replacements
would be nice. After all this landed ofc.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-03-04 12:59 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-20 17:45 [PATCH 00/12] PPGTT with 48b addressing Michel Thierry
2015-02-20 17:45 ` [PATCH 01/12] drm/i915/bdw: Make pdp allocation more dynamic Michel Thierry
2015-03-03 11:48 ` akash goel
2015-03-18 10:15 ` Michel Thierry
2015-02-20 17:45 ` [PATCH 02/12] drm/i915/bdw: Abstract PDP usage Michel Thierry
2015-03-03 12:16 ` akash goel
2015-03-18 10:16 ` Michel Thierry
2015-03-04 3:07 ` akash goel
2015-02-20 17:45 ` [PATCH 03/12] drm/i915/bdw: Add dynamic page trace events Michel Thierry
2015-02-24 10:56 ` Daniel Vetter
2015-02-24 10:59 ` Daniel Vetter
2015-02-20 17:45 ` [PATCH 04/12] drm/i915/bdw: Add ppgtt info for dynamic pages Michel Thierry
2015-03-03 12:23 ` akash goel
2015-03-18 10:17 ` Michel Thierry
2015-02-20 17:45 ` [PATCH 05/12] drm/i915/bdw: implement alloc/free for 4lvl Michel Thierry
2015-03-03 12:55 ` akash goel
2015-03-04 13:00 ` Daniel Vetter [this message]
2015-03-04 2:48 ` akash goel
2015-02-20 17:46 ` [PATCH 06/12] drm/i915/bdw: Add 4 level switching infrastructure Michel Thierry
2015-03-03 13:01 ` akash goel
2015-03-04 13:08 ` Daniel Vetter
2015-02-20 17:46 ` [PATCH 07/12] drm/i915/bdw: Support 64 bit PPGTT in lrc mode Michel Thierry
2015-03-03 13:08 ` akash goel
2015-02-20 17:46 ` [PATCH 08/12] drm/i915/bdw: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-02-20 17:46 ` [PATCH 09/12] drm/i915: Plumb sg_iter through va allocation ->maps Michel Thierry
2015-02-20 17:46 ` [PATCH 10/12] drm/i915/bdw: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-03-03 16:39 ` akash goel
2015-02-20 17:46 ` [PATCH 11/12] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-03-03 16:42 ` akash goel
2015-02-20 17:46 ` [PATCH 12/12] drm/i915/bdw: Flip the 48b switch Michel Thierry
2015-02-24 10:54 ` [PATCH 00/12] PPGTT with 48b addressing Daniel Vetter
2015-03-03 13:52 ` Damien Lespiau
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