Re: [PATCH 6/8] drm/i915/skl: Updated the gen6_rps_limits function

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Thu, Feb 26, 2015 at 06:19:42PM +0530, akash.goel@intel.com wrote:
> From: Akash Goel <akash.goel@intel.com>
> 
> RP Interrupt Up/Down Frequency Limits register (A014) definition
> has changed for SKL. Updated the gen6_rps_limits function as per that
> 
> v2: Renamed the function to intel_rps_limits (Chris)
> 
> Signed-off-by: Akash Goel <akash.goel@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 16 +++++++++++-----
>  1 file changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e094e5d..c3a8704 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3657,7 +3657,7 @@ static void ironlake_disable_drps(struct drm_device *dev)
>   * ourselves, instead of doing a rmw cycle (which might result in us clearing
>   * all limits and the gpu stuck at whatever frequency it is at atm).
>   */
> -static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val)
> +static u32 intel_rps_limits(struct drm_i915_private *dev_priv, u8 val)
>  {
>  	u32 limits;
>  
> @@ -3667,9 +3667,15 @@ static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val)
>  	 * the hw runs at the minimal clock before selecting the desired
>  	 * frequency, if the down threshold expires in that window we will not
>  	 * receive a down interrupt. */
> -	limits = dev_priv->rps.max_freq_softlimit << 24;
> -	if (val <= dev_priv->rps.min_freq_softlimit)
> -		limits |= dev_priv->rps.min_freq_softlimit << 16;
> +	if (IS_GEN9(dev_priv->dev)) {
> +		limits = (dev_priv->rps.max_freq_softlimit) << 23;
> +		if (val <= dev_priv->rps.min_freq_softlimit)
> +			limits |= (dev_priv->rps.min_freq_softlimit) << 14;
> +	} else {
> +		limits = dev_priv->rps.max_freq_softlimit << 24;
> +		if (val <= dev_priv->rps.min_freq_softlimit)
> +			limits |= dev_priv->rps.min_freq_softlimit << 16;
> +	}
>  
>  	return limits;
>  }
> @@ -3810,7 +3816,7 @@ static void gen6_set_rps(struct drm_device *dev, u8 val)
>  	/* Make sure we continue to get interrupts
>  	 * until we hit the minimum or maximum frequencies.
>  	 */
> -	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, gen6_rps_limits(dev_priv, val));
> +	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, intel_rps_limits(dev_priv, val));
>  	I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val));
>  
>  	POSTING_READ(GEN6_RPNSWREQ);
> -- 
> 1.9.2
> 
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-- 
Ville Syrjälä
Intel OTC
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