From: Jeff McGee <jeff.mcgee@intel.com>
To: Thomas Wood <thomas.wood@intel.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH i-g-t 2/2] tests/pm_sseu: Create new test pm_sseu
Date: Wed, 18 Mar 2015 09:51:33 -0700 [thread overview]
Message-ID: <20150318165132.GA8750@jeffdesk> (raw)
In-Reply-To: <CANkqdn2pR9Atbw-0icZ9fTjfdoEiisNaLSBn3o7f8JALpiZukA@mail.gmail.com>
On Thu, Mar 12, 2015 at 12:09:50PM +0000, Thomas Wood wrote:
> On 10 March 2015 at 21:17, <jeff.mcgee@intel.com> wrote:
> > From: Jeff McGee <jeff.mcgee@intel.com>
> >
> > New test pm_sseu is intended for any subtest related to the
> > slice/subslice/EU power gating feature. The sole initial subtest,
> > 'full-enable', confirms that the slice/subslice/EU state is at
> > full enablement when the render engine is active. Starting with
> > Gen9 SKL, the render power gating feature can leave SSEU in a
> > partially enabled state upon resumption of render work unless
> > explicit action is taken.
>
> Please add a short description to the test using the
> IGT_TEST_DESCRIPTION macro, so that it is included in the
> documentation and help output.
>
Hi Thomas. I have posted v2 patches to address this and your other comments.
Can you please have a second look? Thanks
-Jeff
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next prev parent reply other threads:[~2015-03-18 16:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-10 21:17 [PATCH i-g-t 0/2] Confirm full SSEU enable on Gen9+ jeff.mcgee
2015-03-10 21:17 ` [PATCH i-g-t 1/2] lib: Add media spin jeff.mcgee
2015-03-12 17:52 ` [PATCH i-g-t 1/2 v2] " jeff.mcgee
2015-03-25 2:50 ` He, Shuang
2015-03-25 18:07 ` Thomas Wood
2015-03-10 21:17 ` [PATCH i-g-t 2/2] tests/pm_sseu: Create new test pm_sseu jeff.mcgee
2015-03-12 12:09 ` Thomas Wood
2015-03-18 16:51 ` Jeff McGee [this message]
2015-03-12 17:54 ` [PATCH i-g-t 2/2 v2] " jeff.mcgee
2015-03-24 23:20 ` [PATCH i-g-t 2/2 v3] " jeff.mcgee
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