Re: drm/i915: Track GEN6 page table usage

Re: drm/i915: Track GEN6 page table usage

[Dan Carpenter]

Hello Ben Widawsky,

The patch 678d96fbb3b5: "drm/i915: Track GEN6 page table usage" from
Mar 16, 2015, leads to the following static checker warning:

	drivers/gpu/drm/i915/i915_gem_gtt.c:363 alloc_pt_single()
	error: passing non negative 1 to ERR_PTR

drivers/gpu/drm/i915/i915_gem_gtt.c
   292  
   293  /**
   294   * i915_dma_map_single() - Create a dma mapping for a page table/dir/etc.
   295   * @px: Page table/dir/etc to get a DMA map for
   296   * @dev:        drm device
   297   *
   298   * Page table allocations are unified across all gens. They always require a
   299   * single 4k allocation, as well as a DMA mapping. If we keep the structs
   300   * symmetric here, the simple macro covers us for every page table type.
   301   *
   302   * Return: 0 if success.
   303   */
   304  #define i915_dma_map_single(px, dev) \
   305          i915_dma_map_page_single((px)->page, (dev), &(px)->daddr)
   306  
   307  static inline int i915_dma_map_page_single(struct page *page,
   308                                             struct drm_device *dev,
   309                                             dma_addr_t *daddr)
   310  {
   311          struct device *device = &dev->pdev->dev;
   312  
   313          *daddr = dma_map_page(device, page, 0, 4096, PCI_DMA_BIDIRECTIONAL);
   314          return dma_mapping_error(device, *daddr);
                       ^^^^^^^^^^^^^^^^^
This function returns 1 on failure but the callers expect a negative
error code.

   315  }

regards,
dan carpenter
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Re: drm/i915: Track GEN6 page table usage

[Daniel Vetter]

On Mon, Mar 23, 2015 at 06:54:32PM +0300, Dan Carpenter wrote:
> Hello Ben Widawsky,
> 
> The patch 678d96fbb3b5: "drm/i915: Track GEN6 page table usage" from
> Mar 16, 2015, leads to the following static checker warning:
> 
> 	drivers/gpu/drm/i915/i915_gem_gtt.c:363 alloc_pt_single()
> 	error: passing non negative 1 to ERR_PTR

Adding Michel and Mika.

Michel can you pls also update the authorship in your dynamic ppgtt
patches? Of course still ack that they're based on work from Ben, but
given that Ben has left the team and isn't working on this any more not
updating authorship just causes trouble like this.

Thanks, Daniel

> 
> drivers/gpu/drm/i915/i915_gem_gtt.c
>    292  
>    293  /**
>    294   * i915_dma_map_single() - Create a dma mapping for a page table/dir/etc.
>    295   * @px: Page table/dir/etc to get a DMA map for
>    296   * @dev:        drm device
>    297   *
>    298   * Page table allocations are unified across all gens. They always require a
>    299   * single 4k allocation, as well as a DMA mapping. If we keep the structs
>    300   * symmetric here, the simple macro covers us for every page table type.
>    301   *
>    302   * Return: 0 if success.
>    303   */
>    304  #define i915_dma_map_single(px, dev) \
>    305          i915_dma_map_page_single((px)->page, (dev), &(px)->daddr)
>    306  
>    307  static inline int i915_dma_map_page_single(struct page *page,
>    308                                             struct drm_device *dev,
>    309                                             dma_addr_t *daddr)
>    310  {
>    311          struct device *device = &dev->pdev->dev;
>    312  
>    313          *daddr = dma_map_page(device, page, 0, 4096, PCI_DMA_BIDIRECTIONAL);
>    314          return dma_mapping_error(device, *daddr);
>                        ^^^^^^^^^^^^^^^^^
> This function returns 1 on failure but the callers expect a negative
> error code.
> 
>    315  }
> 
> regards,
> dan carpenter
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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