From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Thomas Richter <richter@rus.uni-stuttgart.de>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: R31 dithering
Date: Mon, 30 Mar 2015 14:55:14 +0300 [thread overview]
Message-ID: <20150330115514.GL17410@intel.com> (raw)
In-Reply-To: <5515A830.3030701@rus.uni-stuttgart.de>
On Fri, Mar 27, 2015 at 07:57:52PM +0100, Thomas Richter wrote:
> Hi Daniel, hi Ville,
>
> thanks for your help. I used now the debug output to research how to
> enable dithering on the intel VCH. Apparently, it is bit #4 in register
> VR01 that enables dithering. This is cross-checked by enabling in the
> dvo_ivch.c file, which greatly improves image quality for 24bpp output.
> The bit itself is documented as "reserved" in the intel documentation,
> though it works quite nicely here.
>
> I will now cross-check a little bit which other side effects this bit
> has if combined with other DVO features (16bpp output, and scaler
> enabled). As soon as I have more, I'll prepare a small kernel patch for
> it.
>
> Thanks and have a nice weekend,
BTW I think this bug is about failure to restore the ivch to proper
state after suspend (on X30): https://bugs.freedesktop.org/show_bug.cgi?id=49838
Just in case you're looking for more stuff to do around the ivch ;)
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2015-03-30 11:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-27 8:03 Addressing the intel VCH on the i2c bus / R31 dithering Thomas Richter
2015-03-27 8:40 ` Daniel Vetter
2015-03-27 9:33 ` Ville Syrjälä
2015-03-27 18:57 ` Thomas Richter
2015-03-30 11:55 ` Ville Syrjälä [this message]
2015-03-30 13:54 ` Thomas Richter
2015-03-30 13:59 ` Ville Syrjälä
2015-03-30 14:06 ` Thomas Richter
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