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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Mika Kahola <mika.kahola@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: All sort of cdclk stuff
Date: Wed, 15 Apr 2015 17:18:50 +0300	[thread overview]
Message-ID: <20150415141850.GG1237@intel.com> (raw)
In-Reply-To: <1429103244-3515-1-git-send-email-mika.kahola@intel.com>

On Wed, Apr 15, 2015 at 04:07:10PM +0300, Mika Kahola wrote:
> This patch series rebases Ville's original cdclk patch series
> excluding the ones that	have been reviewed.
> 
> http://lists.freedesktop.org/archives/intel-gfx/2014-November/055633.html
> 
> The patches include modifications to

BTW it would be a good idaa to include some kind of version number note
on the whole series as well. Otherwise it could get a bit hard to find
out which was the latest one. So the usual form is
"[PATCH vN 00/MM] ..." or something like that.

Also 'git format-patch --cover-letter ...' will generate a reasonably
nice template for your cover letter with shortlog included.

> 
>   drm/i915: Fix i855_get_display_clock_speed()
>   drm/i915: Fix 852GM/GMV cdclk
>   drm/i915: Add cdclk extraction for g33, 965gm and g4x
>   drm/i915: Warn when cdclk for the platforms is not known
>   drm/i915: Cache the current cdclk frequency in dev_priv
>   drm/i915: Use cached cdclk value
>   drm/i915: Unify ilk and hsw .get_aux_clock_divider()
>   drm/i915: Store max cdclk value in dev_priv
>   drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
>   drm/i915: HSW cdclk change support
>   drm/i915: Add IS_BDW_ULX()
>   drm/i915: BDW cdclk change support
>   drm/i915: Limit CHV max cdclk to 320 MHz
>   drm/i915: Modeset global_pipes() update
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2015-04-15 14:19 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-15 13:07 All sort of cdclk stuff Mika Kahola
2015-04-15 13:07 ` [PATCH 01/14] drm/i915: Fix i855 get_display_clock_speed Mika Kahola
2015-04-15 13:07 ` [PATCH 02/14] drm/i915: Fix 852GM/GMV cdclk Mika Kahola
2015-04-15 13:07 ` [PATCH 03/14] drm/i915: Add cdclk extraction for g33, g965gm and g4x Mika Kahola
2015-04-15 13:07 ` [PATCH 04/14] drm/i915: Warn when cdclk for the platforms is not known Mika Kahola
2015-04-15 13:07 ` [PATCH 05/14] drm/i915: Cache current cdclk frequency in dev_priv Mika Kahola
2015-04-15 13:07 ` [PATCH 06/14] drm/i915: Use cached cdclk value Mika Kahola
2015-04-15 13:07 ` [PATCH 07/14] drm/i915: Unify ilk and hsw .get_aux_clock_divider Mika Kahola
2015-04-15 13:07 ` [PATCH 08/14] drm/i915: Store max cdclk value in dev_priv Mika Kahola
2015-04-15 13:07 ` [PATCH 09/14] drm/i915: Don't enable IPS when pixel rate exceeds 95% Mika Kahola
2015-04-15 13:07 ` [PATCH 10/14] drm/i915: HSW cdclk support Mika Kahola
2015-04-15 13:07 ` [PATCH 11/14] drm/i915: Add IS_BDW_ULX Mika Kahola
2015-04-15 13:07 ` [PATCH 12/14] drm/i915: BDW clock change support Mika Kahola
2015-04-15 13:07 ` [PATCH 13/14] drm/i915: Limit CHV max cdclk Mika Kahola
2015-04-15 19:19   ` Ville Syrjälä
2015-04-15 13:07 ` [PATCH 14/14] drm/i915: Modeset global_pipes() update Mika Kahola
2015-04-15 19:19   ` Ville Syrjälä
2015-04-17  9:23   ` shuang.he
2015-04-15 13:16 ` All sort of cdclk stuff Damien Lespiau
2015-04-15 13:58   ` Mika Kahola
2015-04-15 14:18 ` Ville Syrjälä [this message]
2015-04-16 13:11   ` Jani Nikula
  -- strict thread matches above, loose matches on Subject: below --
2015-03-31 11:05 Mika Kahola
2015-03-31 13:18 ` Damien Lespiau

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