From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Dave Gordon <david.s.gordon@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Fix 32b overflow check in gen8_ppgtt_alloc_page_directories
Date: Thu, 30 Apr 2015 17:58:47 +0300 [thread overview]
Message-ID: <20150430145847.GA18908@intel.com> (raw)
In-Reply-To: <554241E9.1020400@intel.com>
On Thu, Apr 30, 2015 at 03:53:29PM +0100, Dave Gordon wrote:
> On 30/04/15 15:33, Michel Thierry wrote:
> > On 4/30/2015 3:22 PM, Ville Syrjälä wrote:
> >> On Thu, Apr 30, 2015 at 02:59:34PM +0100, Michel Thierry wrote:
> >>> The patch 69876bed7e008f5fe01538a2d47c09f2862129d0: "drm/i915/gen8:
> >>> page directories rework allocation" added an overflow warning, but the
> >>> mask had an extra 0. Use typo-prone option suggested by Dave instead.
> >>>
> >>> This check will be unnecessary after gen8_alloc_va_range handles more
> >>> than 4 PDPs (48b addressing).
> >>>
> >>> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> >>> Cc: Dave Gordon <david.s.gordon@intel.com>
> >>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> >>> ---
> >>> drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
> >>> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> >>> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> >>> index 6fae6bd..6d894fc 100644
> >>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> >>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> >>> @@ -756,8 +756,8 @@ static int
> >>> gen8_ppgtt_alloc_page_directories(struct i915_hw_ppgtt *ppgtt,
> >>>
> >>> WARN_ON(!bitmap_empty(new_pds, GEN8_LEGACY_PDPES));
> >>>
> >>> - /* FIXME: PPGTT container_of won't work for 64b */
> >>> - WARN_ON((start + length) > 0x800000000ULL);
> >>> + /* FIXME: upper bound must not overflow 31 bits */
> >>> + WARN_ON((start + length) & (~0ULL << 31));
> >>
> >> Why is it 31 and not 32?
> >
> > Right, the check really should be (start + length) >= 0x100000000ULL.
>
> Something with '32' in it might be more obvious and save anyone having
> to count the zeroes ... and a comment that also mentioned the limit:
>
> /* FIXME: for now, upper bound must fit in 32 bits */
>
> WARN_ON((start + length) >= (1ULL << 32))
This would match the '1ULL<<32' used in the ppgtt init.
> WARN_ON((start + length) & (~0ULL << 32))
> WARN_ON((start + length) >> 32) != 0)
>
> .Dave.
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2015-04-30 14:58 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-30 10:47 drm/i915/gen8: page directories rework allocation Dan Carpenter
2015-04-30 12:27 ` Dave Gordon
2015-04-30 13:59 ` [PATCH] drm/i915: Fix 32b overflow check in gen8_ppgtt_alloc_page_directories Michel Thierry
2015-04-30 14:22 ` Ville Syrjälä
2015-04-30 14:33 ` Michel Thierry
2015-04-30 14:53 ` Dave Gordon
2015-04-30 14:56 ` Michel Thierry
2015-04-30 14:58 ` Ville Syrjälä [this message]
2015-05-02 0:38 ` shuang.he
2015-05-04 12:57 ` David Weinehall
2015-04-30 15:06 ` [PATCH v2] " Michel Thierry
2015-05-02 4:26 ` shuang.he
2015-05-06 10:14 ` Daniel Vetter
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