From: Daniel Vetter <daniel@ffwll.ch>
To: Animesh Manna <animesh.manna@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4 0/8] Enable DC states for skl.
Date: Mon, 4 May 2015 15:12:18 +0200 [thread overview]
Message-ID: <20150504131218.GX30184@phenom.ffwll.local> (raw)
In-Reply-To: <1429174334-12089-1-git-send-email-animesh.manna@intel.com>
On Thu, Apr 16, 2015 at 02:22:06PM +0530, Animesh Manna wrote:
> v4:
> - Removed all warning by reordering the patchsets.
> - Changed the dmc firmware file name skl_dmc_ver1.bin, followed naming conventipon as <platform>_dmc_<api-version>.bin
>
> v3:
> MOdified the code of patch 1 and 3 based on review commets.
>
> v2:
> Based on review comments modified the code.
>
> v1:
> Initial version send as RFC.
>
> This patch series contains the implementation for enabling DC states for gen9
> platform, specifically for skl. Few bxt specific changes will be submitted
> separately in a different patch series which will be extended support for bxt
> and will use major portion of the code of this patch series.
>
> A.Sunil Kamath (3):
> drm/i915/skl: Add support to load SKL CSR firmware.
> drm/i915/skl: Implement enable/disable for Display C5 state.
> Implement enable/disable for Display C6 state.
>
> Suketu Shah (5):
> drm/i915/skl: Add DC5 Trigger Sequence.
> drm/i915/skl: Assert the requirements to enter or exit DC5.
> drm/i915/skl: Add DC6 Trigger sequence.
> drm/i915/skl: Assert the requirements to enter or exit DC6.
> drm/i915/skl: Enable runtime PM
Ok I pulled in the entire series. A bunch of follow-up refactoring patches
are imo required for polish, plus two more things overall I've spotted:
- intel_csr.c is lacking kerneldoc for public functions, plus a high-level
text about how the firmware loading interacts with everything else might
be good.
- dev_priv->csr_lock doesn't document what exactly it protects and looks a
lot like cargo-culting - it seems to abuse locking for enforcing
ordering, which rarely works out well. But that was just a very cursory
look, I might be mistaken.
Thanks, Daniel
>
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/i915_dma.c | 11 +-
> drivers/gpu/drm/i915/i915_drv.c | 50 ++++
> drivers/gpu/drm/i915/i915_drv.h | 27 +-
> drivers/gpu/drm/i915/i915_reg.h | 11 +
> drivers/gpu/drm/i915/intel_csr.c | 421 ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 9 +
> drivers/gpu/drm/i915/intel_runtime_pm.c | 199 ++++++++++++++-
> 8 files changed, 726 insertions(+), 5 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/intel_csr.c
>
> --
> 2.0.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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prev parent reply other threads:[~2015-05-04 13:09 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-16 8:52 [PATCH v4 0/8] Enable DC states for skl Animesh Manna
2015-04-16 8:52 ` [PATCH v4 1/8] drm/i915/skl: Add support to load SKL CSR firmware Animesh Manna
2015-04-16 9:18 ` Damien Lespiau
2015-04-16 9:21 ` Imre Deak
2015-04-16 11:59 ` Animesh Manna
2015-04-16 11:25 ` Imre Deak
2015-04-16 14:23 ` Animesh Manna
2015-04-16 15:20 ` Imre Deak
2015-04-28 14:45 ` Imre Deak
2015-04-29 17:29 ` [PATCH v5 " Animesh Manna
2015-04-30 13:02 ` Imre Deak
2015-05-04 9:30 ` Daniel Vetter
2015-05-04 10:31 ` Imre Deak
2015-05-04 12:54 ` Daniel Vetter
2015-04-16 8:52 ` [PATCH v4 2/8] drm/i915/skl: Add DC5 Trigger Sequence Animesh Manna
2015-04-16 9:25 ` Imre Deak
2015-04-16 9:48 ` Imre Deak
2015-04-17 5:59 ` Animesh Manna
2015-04-17 7:15 ` Imre Deak
2015-04-17 14:16 ` [PATCH v5 2/2] " Animesh Manna
2015-04-30 13:18 ` Imre Deak
2015-05-04 9:39 ` Daniel Vetter
2015-04-16 8:52 ` [PATCH v4 3/8] drm/i915/skl: Implement enable/disable for Display C5 state Animesh Manna
2015-04-30 13:21 ` Imre Deak
2015-04-16 8:52 ` [PATCH v4 4/8] drm/i915/skl: Assert the requirements to enter or exit DC5 Animesh Manna
2015-04-30 13:26 ` Imre Deak
2015-04-16 8:52 ` [PATCH v4 5/8] drm/i915/skl: Add DC6 Trigger sequence Animesh Manna
2015-04-30 13:41 ` Imre Deak
2015-05-04 9:44 ` Daniel Vetter
2015-05-04 13:05 ` Daniel Vetter
2015-04-16 8:52 ` [PATCH v4 6/8] Implement enable/disable for Display C6 state Animesh Manna
2015-04-30 13:45 ` Imre Deak
2015-04-16 8:52 ` [PATCH v4 7/8] drm/i915/skl: Assert the requirements to enter or exit DC6 Animesh Manna
2015-04-16 8:52 ` [PATCH v4 8/8] drm/i915/skl: Enable runtime PM Animesh Manna
2015-04-17 1:52 ` shuang.he
2015-04-30 13:47 ` Imre Deak
2015-05-04 13:12 ` Daniel Vetter [this message]
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