From: Daniel Vetter <daniel@ffwll.ch>
To: Chandra Konduru <chandra.konduru@intel.com>
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org,
ville.syrjala@intel.com
Subject: Re: [PATCH 09/11] drm/i915: Update compute_baseline_bpp for NV12.
Date: Thu, 7 May 2015 08:59:06 +0200 [thread overview]
Message-ID: <20150507065906.GT30184@phenom.ffwll.local> (raw)
In-Reply-To: <1430451795-9657-10-git-send-email-chandra.konduru@intel.com>
On Thu, Apr 30, 2015 at 08:43:13PM -0700, Chandra Konduru wrote:
> This patch updates baseline bpp when primary plane
> is running with NV12. It is same as 8-bpc RGB formats
> because NV12 also has 8-bits per channel.
>
> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
This code was removed in
commit d328c9d78d64ca11e744fe227096990430a88477
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri Apr 10 16:22:37 2015 +0200
drm/i915: Select starting pipe bpp irrespective or the primary plane
Please rebase onto latest -nightly before submitting to check for such
things.
Thanks, Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6e693c4..e747766 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10845,6 +10845,7 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
> return -EINVAL;
> case DRM_FORMAT_XRGB8888:
> case DRM_FORMAT_ARGB8888:
> + case DRM_FORMAT_NV12:
> bpp = 8*3;
> break;
> case DRM_FORMAT_XRGB2101010:
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-05-07 6:56 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-01 3:43 [PATCH 00/11] Skylake display NV12 feature addition Chandra Konduru
2015-05-01 3:43 ` [PATCH 01/11] drm/i915: Add register definitions for NV12 support Chandra Konduru
2015-05-01 3:43 ` [PATCH 02/11] drm/i915: Set scaler mode for NV12 Chandra Konduru
2015-05-01 3:43 ` [PATCH 03/11] drm/i915: Stage scaler request for NV12 as src format Chandra Konduru
2015-05-01 3:43 ` [PATCH 04/11] drm/i915: Update format_is_yuv() to include NV12 Chandra Konduru
2015-05-01 3:43 ` [PATCH 05/11] drm/i915: Upscale scaler max scale for NV12 Chandra Konduru
2015-05-01 3:43 ` [PATCH 06/11] drm/i915: Add NV12 as supported format for primary plane Chandra Konduru
2015-05-07 6:56 ` Daniel Vetter
2015-05-08 2:29 ` Konduru, Chandra
2015-05-08 7:13 ` Daniel Vetter
2015-05-01 3:43 ` [PATCH 07/11] drm/i915: Add NV12 as supported format for sprite plane Chandra Konduru
2015-05-01 3:43 ` [PATCH 08/11] drm/i915: Add NV12 support to intel_framebuffer_init Chandra Konduru
2015-05-11 10:54 ` Tvrtko Ursulin
2015-05-11 11:08 ` Ville Syrjälä
2015-05-01 3:43 ` [PATCH 09/11] drm/i915: Update compute_baseline_bpp for NV12 Chandra Konduru
2015-05-07 6:59 ` Daniel Vetter [this message]
2015-05-07 16:01 ` Konduru, Chandra
2015-05-01 3:43 ` [PATCH 10/11] drm/i915: Add NV12 to primary plane programming Chandra Konduru
2015-05-08 20:40 ` Chandra Konduru
2015-05-11 10:24 ` Tvrtko Ursulin
2015-05-01 3:43 ` [PATCH 11/11] drm/i915: Add NV12 to sprite " Chandra Konduru
2015-05-14 5:13 ` [PATCH 00/11] Skylake display NV12 feature addition Konduru, Chandra
2015-05-14 12:46 ` Tvrtko Ursulin
2015-05-18 5:24 ` Konduru, Chandra
2015-05-18 10:42 ` Tvrtko Ursulin
2015-05-19 23:21 ` Konduru, Chandra
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