Re: [PATCH 1/3] drm/i915: Sink rate read should be saved in deca-kHz

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Thu, May 07, 2015 at 11:10:30AM +0300, Jani Nikula wrote:
> On Thu, 07 May 2015, Sonika Jindal <sonika.jindal@intel.com> wrote:
> > The sink rate read from supported link rate table is in KHz as per spec
> > while in drm, the saved clock is in deca-KHz. So divide the link rate by
> > 10 before storing.
> 
> Please refer to the commit which broke things. git blame is your
> friend. We need the information to know which kernel version the bug has
> landed or is about to land to, so we can queue the fix in the same
> place.
> 
> If developers don't do this, maintainers will have to anyway, which
> doesn't scale well, which leads to grumpy maintainers. ;)

Indeed, now I wonder if I broke it during the refactoring or was it
already like that before that. Hmm. Doesn't look like it was me, but
I did fail to spot it during the review :(

Anyway, with the commit msg amended to Jani's liking this is:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Thanks,
> Jani.
> 
> 
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
> > ---
> > Just resending it along with the other intermediate link rate patches
> > (It was posted orginally on 21st April)
> >
> > Thanks,
> > Sonika
> >
> >  drivers/gpu/drm/i915/intel_dp.c |    3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index bacdec5..6bd5afb 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -3906,7 +3906,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
> >  			if (val == 0)
> >  				break;
> >  
> > -			intel_dp->sink_rates[i] = val * 200;
> > +			/* Value read is in kHz while drm clock is saved in deca-kHz */
> > +			intel_dp->sink_rates[i] = (val * 200) / 10;
> >  		}
> >  		intel_dp->num_sink_rates = i;
> >  	}
> > -- 
> > 1.7.10.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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