From: Daniel Vetter <daniel@ffwll.ch>
To: Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/13] drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll()
Date: Fri, 8 May 2015 09:19:13 +0200 [thread overview]
Message-ID: <20150508071913.GK30184@phenom.ffwll.local> (raw)
In-Reply-To: <1431020329-11414-2-git-send-email-damien.lespiau@intel.com>
On Thu, May 07, 2015 at 06:38:37PM +0100, Damien Lespiau wrote:
> A part of this function was indented with 2 tabs and 1 space instead of
> just 2 tabs. We're going to touch that code, so start by re-indenting
> it.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 64 ++++++++++++++++++++--------------------
> 1 file changed, 32 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 9c1e74a..2e24fa4 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1188,69 +1188,69 @@ found:
> if (min_dco_index > 2) {
> WARN(1, "No valid values found for the given pixel clock\n");
> } else {
> - wrpll_params->central_freq = dco_central_freq[min_dco_index];
> + wrpll_params->central_freq = dco_central_freq[min_dco_index];
>
> - switch (dco_central_freq[min_dco_index]) {
> - case 9600000000ULL:
> + switch (dco_central_freq[min_dco_index]) {
> + case 9600000000ULL:
> wrpll_params->central_freq = 0;
> break;
> - case 9000000000ULL:
> + case 9000000000ULL:
> wrpll_params->central_freq = 1;
> break;
> - case 8400000000ULL:
> + case 8400000000ULL:
> wrpll_params->central_freq = 3;
> - }
> + }
>
> - switch (candidate_p0[min_dco_index]) {
> - case 1:
> + switch (candidate_p0[min_dco_index]) {
> + case 1:
> wrpll_params->pdiv = 0;
> break;
> - case 2:
> + case 2:
> wrpll_params->pdiv = 1;
> break;
> - case 3:
> + case 3:
> wrpll_params->pdiv = 2;
> break;
> - case 7:
> + case 7:
> wrpll_params->pdiv = 4;
> break;
> - default:
> + default:
> WARN(1, "Incorrect PDiv\n");
> - }
> + }
>
> - switch (candidate_p2[min_dco_index]) {
> - case 5:
> + switch (candidate_p2[min_dco_index]) {
> + case 5:
> wrpll_params->kdiv = 0;
> break;
> - case 2:
> + case 2:
> wrpll_params->kdiv = 1;
> break;
> - case 3:
> + case 3:
> wrpll_params->kdiv = 2;
> break;
> - case 1:
> + case 1:
> wrpll_params->kdiv = 3;
> break;
> - default:
> + default:
> WARN(1, "Incorrect KDiv\n");
> - }
> + }
>
> - wrpll_params->qdiv_ratio = candidate_p1[min_dco_index];
> - wrpll_params->qdiv_mode =
> + wrpll_params->qdiv_ratio = candidate_p1[min_dco_index];
> + wrpll_params->qdiv_mode =
> (wrpll_params->qdiv_ratio == 1) ? 0 : 1;
>
> - dco_freq = candidate_p0[min_dco_index] *
> - candidate_p1[min_dco_index] *
> - candidate_p2[min_dco_index] * afe_clock;
> + dco_freq = candidate_p0[min_dco_index] *
> + candidate_p1[min_dco_index] *
> + candidate_p2[min_dco_index] * afe_clock;
>
> /*
> - * Intermediate values are in Hz.
> - * Divide by MHz to match bsepc
> - */
> - wrpll_params->dco_integer = div_u64(dco_freq, (24 * MHz(1)));
> - wrpll_params->dco_fraction =
> - div_u64(((div_u64(dco_freq, 24) -
> - wrpll_params->dco_integer * MHz(1)) * 0x8000), MHz(1));
> + * Intermediate values are in Hz.
> + * Divide by MHz to match bsepc
> + */
> + wrpll_params->dco_integer = div_u64(dco_freq, (24 * MHz(1)));
> + wrpll_params->dco_fraction =
> + div_u64(((div_u64(dco_freq, 24) -
> + wrpll_params->dco_integer * MHz(1)) * 0x8000), MHz(1));
>
> }
> }
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-05-08 7:16 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-07 17:38 [PATCH 00/13] Update of the HDMI DPLL dividers computation Damien Lespiau
2015-05-07 17:38 ` [PATCH 01/13] drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll() Damien Lespiau
2015-05-08 7:19 ` Daniel Vetter [this message]
2015-05-07 17:38 ` [PATCH 02/13] drm/i915/skl: Make sure to break when not finding suitable PLL dividers Damien Lespiau
2015-05-27 17:58 ` Paulo Zanoni
2015-05-28 6:31 ` Jani Nikula
2015-05-28 7:45 ` Daniel Vetter
2015-05-28 13:59 ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 03/13] drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failing Damien Lespiau
2015-05-28 7:48 ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 04/13] drm/i915/skl: Propagate the error if we fail to find a suitable DPLL divider Damien Lespiau
2015-05-07 17:38 ` [PATCH 05/13] drm/i915/skl: Use a more idomatic early return Damien Lespiau
2015-05-07 17:38 ` [PATCH 06/13] drm/i915/skl: Factor out computing the DPLL paramaters from the dividers Damien Lespiau
2015-05-07 17:38 ` [PATCH 07/13] drm/i915/skl: Remove unnecessary () used with div_u64() Damien Lespiau
2015-05-07 17:38 ` [PATCH 08/13] drm/i915/skl: Remove unnecessary () used with abs_diff() Damien Lespiau
2015-05-27 18:42 ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 09/13] drm/i915/skl: Use MISSING_CASE() in skl_wrpll_params_populate() Damien Lespiau
2015-05-27 18:40 ` Paulo Zanoni
2015-05-28 7:51 ` Daniel Vetter
2015-05-28 14:06 ` Paulo Zanoni
2015-06-03 12:42 ` Damien Lespiau
2015-05-07 17:38 ` [PATCH 10/13] drm/i915: Correctly prefix HSW/BDW HDMI clock functions Damien Lespiau
2015-05-27 19:54 ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 11/13] drm/i915/skl: Don't try to store the wrong central frequency Damien Lespiau
2015-05-27 19:58 ` Paulo Zanoni
2015-05-28 7:53 ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 12/13] drm/i915/skl: Replace the HDMI DPLL divider computation algorithm Damien Lespiau
2015-05-27 21:28 ` Paulo Zanoni
2015-05-27 21:51 ` Paulo Zanoni
2015-06-25 15:00 ` Damien Lespiau
2015-06-25 15:15 ` [PATCH 12/13 v2] " Damien Lespiau
2015-06-26 17:09 ` Paulo Zanoni
2015-06-25 10:21 ` [PATCH 12/13] " Damien Lespiau
2015-05-07 17:38 ` [PATCH 13/13] drm/i915/skl: Prefer even dividers for SKL DPLLs Damien Lespiau
2015-05-08 12:22 ` shuang.he
2015-05-27 21:39 ` Paulo Zanoni
2015-05-27 22:08 ` Paulo Zanoni
2015-06-25 15:18 ` Damien Lespiau
2015-06-25 15:19 ` [PATCH 13/13 v2] " Damien Lespiau
2015-06-26 17:08 ` Paulo Zanoni
2015-06-26 17:39 ` Daniel Vetter
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