From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org,
ville.syrjala@intel.com
Subject: Re: [PATCH 08/11] drm/i915: Add NV12 support to intel_framebuffer_init
Date: Mon, 11 May 2015 14:08:49 +0300 [thread overview]
Message-ID: <20150511110849.GM18908@intel.com> (raw)
In-Reply-To: <55508A53.2050408@linux.intel.com>
On Mon, May 11, 2015 at 11:54:11AM +0100, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 05/01/2015 04:43 AM, Chandra Konduru wrote:
> > This patch adds NV12 as supported format to
> > intel_framebuffer_init and performs various checks.
> >
> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> > Testcase: igt/kms_nv12
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 27 +++++++++++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index d3773d2..6e693c4 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -13953,6 +13953,33 @@ static int intel_framebuffer_init(struct drm_device *dev,
> > return -EINVAL;
> > }
> > break;
> > + case DRM_FORMAT_NV12:
> > + if (INTEL_INFO(dev)->gen < 9) {
> > + DRM_DEBUG("unsupported pixel format: %s\n",
> > + drm_get_format_name(mode_cmd->pixel_format));
> > + return -EINVAL;
> > + }
> > + if (!mode_cmd->offsets[1]) {
> > + DRM_DEBUG("uv start offset not set\n");
> > + return -EINVAL;
> > + }
> > + if (mode_cmd->pitches[0] != mode_cmd->pitches[1] ||
> > + mode_cmd->handles[0] != mode_cmd->handles[1]) {
> > + DRM_DEBUG("y and uv subplanes have different parameters\n");
> > + return -EINVAL;
> > + }
> > + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Yf_TILED &&
> > + (mode_cmd->offsets[1] & 0xFFF)) {
> > + DRM_DEBUG("tile-Yf uv offset 0x%x isn't starting on new tile-row\n",
> > + mode_cmd->offsets[1]);
> > + return -EINVAL;
> > + }
> > + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Y_TILED &&
> > + ((mode_cmd->offsets[1] % mode_cmd->pitches[1]) % 4)) {
> > + DRM_DEBUG("tile-Y uv offset 0x%x isn't 4-line aligned\n",
> > + mode_cmd->offsets[1]);
> > + }
> > + break;
> > default:
> > DRM_DEBUG("unsupported pixel format: %s\n",
> > drm_get_format_name(mode_cmd->pixel_format));
> >
>
> I've noticed a bunch of:
>
> [ 566.106745] [drm:drm_mode_addfb2] [FB:58]
> [ 566.111384] [drm:drm_fb_get_bpp_depth] unsupported pixel format NV12 little-endian (0x3231564e)
> [ 566.121283] [drm:drm_mode_addfb2] [FB:59]
> [ 566.125912] [drm:drm_fb_get_bpp_depth] unsupported pixel format NV12 little-endian (0x3231564e)
>
> And on investigating, they probably come from drm_helper_mode_fill_fb_struct
> in intel_framebuffer_init.
>
> Result is that fb->depth and fb->bits_per_pixel will be zero, which can't be good. :)
Actually it is good. We have the same situation with all YCbCr formats.
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2015-05-11 11:08 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-01 3:43 [PATCH 00/11] Skylake display NV12 feature addition Chandra Konduru
2015-05-01 3:43 ` [PATCH 01/11] drm/i915: Add register definitions for NV12 support Chandra Konduru
2015-05-01 3:43 ` [PATCH 02/11] drm/i915: Set scaler mode for NV12 Chandra Konduru
2015-05-01 3:43 ` [PATCH 03/11] drm/i915: Stage scaler request for NV12 as src format Chandra Konduru
2015-05-01 3:43 ` [PATCH 04/11] drm/i915: Update format_is_yuv() to include NV12 Chandra Konduru
2015-05-01 3:43 ` [PATCH 05/11] drm/i915: Upscale scaler max scale for NV12 Chandra Konduru
2015-05-01 3:43 ` [PATCH 06/11] drm/i915: Add NV12 as supported format for primary plane Chandra Konduru
2015-05-07 6:56 ` Daniel Vetter
2015-05-08 2:29 ` Konduru, Chandra
2015-05-08 7:13 ` Daniel Vetter
2015-05-01 3:43 ` [PATCH 07/11] drm/i915: Add NV12 as supported format for sprite plane Chandra Konduru
2015-05-01 3:43 ` [PATCH 08/11] drm/i915: Add NV12 support to intel_framebuffer_init Chandra Konduru
2015-05-11 10:54 ` Tvrtko Ursulin
2015-05-11 11:08 ` Ville Syrjälä [this message]
2015-05-01 3:43 ` [PATCH 09/11] drm/i915: Update compute_baseline_bpp for NV12 Chandra Konduru
2015-05-07 6:59 ` Daniel Vetter
2015-05-07 16:01 ` Konduru, Chandra
2015-05-01 3:43 ` [PATCH 10/11] drm/i915: Add NV12 to primary plane programming Chandra Konduru
2015-05-08 20:40 ` Chandra Konduru
2015-05-11 10:24 ` Tvrtko Ursulin
2015-05-01 3:43 ` [PATCH 11/11] drm/i915: Add NV12 to sprite " Chandra Konduru
2015-05-14 5:13 ` [PATCH 00/11] Skylake display NV12 feature addition Konduru, Chandra
2015-05-14 12:46 ` Tvrtko Ursulin
2015-05-18 5:24 ` Konduru, Chandra
2015-05-18 10:42 ` Tvrtko Ursulin
2015-05-19 23:21 ` Konduru, Chandra
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