From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/4] drm/i915: Support for higher DSI clk
Date: Tue, 12 May 2015 19:49:26 +0300 [thread overview]
Message-ID: <20150512164926.GM18908@intel.com> (raw)
In-Reply-To: <1a339b83657314dc807693fbad474d31561db7e4.1431440230.git.jani.nikula@intel.com>
On Tue, May 12, 2015 at 05:20:40PM +0300, Jani Nikula wrote:
> From: Gaurav K Singh <gaurav.k.singh@intel.com>
>
> For MIPI panels requiring higher DSI clk, values needs to be added
> in lfsr_converts table for getting the correct values of pll ctrl
> and dividor values which gets programmed in cck regs, otherwise DSI
> PLL does not get locked leading to no display on the MIPI panel.
>
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index effb561e00a0..d1aefc7a0629 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -67,8 +67,8 @@ struct dsi_mnp {
> static const u32 lfsr_converts[] = {
> 426, 469, 234, 373, 442, 221, 110, 311, 411, /* 62 - 70 */
> 461, 486, 243, 377, 188, 350, 175, 343, 427, 213, /* 71 - 80 */
> - 106, 53, 282, 397, 354, 227, 113, 56, 284, 142, /* 81 - 90 */
> - 71, 35 /* 91 - 92 */
> + 106, 53, 282, 397, 454, 227, 113, 56, 284, 142, /* 81 - 90 */
> + 71, 35, 273, 136, 324, 418, 465, 488, 500, 506 /* 91 - 100 */
I've never seen any details about this lfsr in any docs. However this is
actually a subset of mdfld_m_converts[] in gma500, so based on that:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> };
>
> #ifdef DSI_CLK_FROM_RR
> --
> 2.1.4
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-05-12 16:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-12 14:20 [PATCH 0/4] drm/i915/chv dsi pll stuff Jani Nikula
2015-05-12 14:20 ` [PATCH 1/4] drm/i915/dsi: abstract dsi bpp derivation from pixel format Jani Nikula
2015-05-12 14:45 ` Ville Syrjälä
2015-05-13 7:28 ` Jani Nikula
2015-05-12 14:20 ` [PATCH 2/4] drm/i915/dsi: add support for DSI PLL N1 divisor values Jani Nikula
2015-05-12 14:52 ` Ville Syrjälä
2015-05-13 7:35 ` [PATCH v2] " Jani Nikula
2015-05-13 9:17 ` Ville Syrjälä
2015-05-15 11:39 ` shuang.he
2015-05-12 14:20 ` [PATCH 3/4] drm/i915: Support for higher DSI clk Jani Nikula
2015-05-12 16:49 ` Ville Syrjälä [this message]
2015-05-12 14:20 ` [PATCH 4/4] drm/i915: Changes required to enable DSI Video Mode on CHT Jani Nikula
2015-05-12 16:42 ` Ville Syrjälä
2015-05-14 15:47 ` shuang.he
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150512164926.GM18908@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox