Re: [PATCH] drm/i915: Preserve ddi_pll_sel when allocating new pipe_config

[Damien Lespiau <damien.lespiau@intel.com>]

On Fri, May 15, 2015 at 11:51:50AM +0300, Ander Conselvan de Oliveira wrote:
> When the modeset code is reached with a CRTC that only needs a flip, the
> code that assigns PLLs is skipped. But since there is still a state swap
> for that CRTC, the current PLL assignment needs to be preserved. I
> missed the ddi_pll_sel field in the following commit, which causes
> warnings in DDI platforms.
> 
> commit 4978cc93d9ac240b435ce60431aef24239b4c270
> Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
> Date:   Tue Apr 21 17:13:21 2015 +0300
> 
>     drm/i915: Preserve shared DPLL information in new pipe_config
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90410
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>

(it's probably be good to update the comment with the reason *why* we
preserve some state (both the base states and some of the intel states,
not that we actually do so, it's easy to figure that part from the code,
typical a++; /* increment a */ comment :)

-- 
Damien

> ---
>  drivers/gpu/drm/i915/intel_display.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b580640..8d40d7d 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11452,12 +11452,14 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state)
>  	struct intel_crtc_scaler_state scaler_state;
>  	struct intel_dpll_hw_state dpll_hw_state;
>  	enum intel_dpll_id shared_dpll;
> +	uint32_t ddi_pll_sel;
>  
>  	/* Clear only the intel specific part of the crtc state excluding scalers */
>  	tmp_state = crtc_state->base;
>  	scaler_state = crtc_state->scaler_state;
>  	shared_dpll = crtc_state->shared_dpll;
>  	dpll_hw_state = crtc_state->dpll_hw_state;
> +	ddi_pll_sel = crtc_state->ddi_pll_sel;
>  
>  	memset(crtc_state, 0, sizeof *crtc_state);
>  
> @@ -11465,6 +11467,7 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state)
>  	crtc_state->scaler_state = scaler_state;
>  	crtc_state->shared_dpll = shared_dpll;
>  	crtc_state->dpll_hw_state = dpll_hw_state;
> +	crtc_state->ddi_pll_sel = ddi_pll_sel;
>  }
>  
>  static int
> -- 
> 2.1.0
> 
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