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From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	Daniel Vetter <daniel@ffwll.ch>,
	intel-gfx@lists.freedesktop.org,
	Akash Goel <akash.goel@intel.com>,
	stable@vger.kernel.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Unconditionally flush writes before execbuffer
Date: Thu, 21 May 2015 17:30:32 +0200	[thread overview]
Message-ID: <20150521153032.GI15256@phenom.ffwll.local> (raw)
In-Reply-To: <20150521152255.GS17761@nuc-i3427.alporthouse.com>

On Thu, May 21, 2015 at 04:22:55PM +0100, Chris Wilson wrote:
> On Thu, May 21, 2015 at 04:21:46PM +0200, Daniel Vetter wrote:
> > Hm right. What about emphasising this a bit more in the comment:
> > 
> > 	/*
> > 	 * Empirical evidence indicates that we need a write barrier to
> > 	 * make sure write-combined writes (both to the gtt, but also to
> > 	 * the cpu mmaps). But userspace also uses wc mmaps as
> > 	 * unsynchronized upload paths where it inform the kernel about
> > 	 * domain changes (to avoid the stalls). Hence we must do this
> > 	 * barrier unconditinally.
> > 	 */
> 
> For reference the wording in the commit is:
> 
> /* Unconditionally flush out writes to memory as the user may be
>  * doing asynchronous streaming writes to active buffers (i.e.
>  * lazy domain management to avoid serialisation) directly into
>  * the physical pages and so not naturally serialised by the GTT.
>  */
> 
> > Mostly just rewording, unsing unsynchronized as used by gl/libdrm and
> > clarification why we need to have the barrier unconditionally. With that
> 
> Hmm, glMapBufferRange does use unsynchronized, but async is almost
> universally preferred when talking about io and runqueues.
> 
> /* Unconditionally flush out writes to memory as the user may be
>  * doing asynchronous streaming writes to active buffers in this
>  * batch (i.e. lazy domain management to avoid serialisation, for
>  * example with glMapBufferRange(GL_MAP_UNSYNCHRONIZED_BIT)) directly
>  * into the physical pages and so not naturally serialised by the GTT.
>  */
> 
> > Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Yeah, r-b: me also with this one. Jani, can you please exchange the
comment and apply to -fixes?
-Daniel

> > 
> > And I guess also
> > 
> > Cc: stable@vger.kernel.org
> 
> It already was ;-)
> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

  reply	other threads:[~2015-05-21 15:30 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-11  7:51 [PATCH] drm/i915: Unconditionally flush writes before execbuffer Chris Wilson
2015-05-11 10:34 ` Daniel Vetter
2015-05-11 10:37   ` [Intel-gfx] " Chris Wilson
2015-05-11 15:25   ` Chris Wilson
2015-05-12 10:19     ` [Intel-gfx] " Chris Wilson
2015-05-19 14:41     ` Chris Wilson
2015-05-21 13:00       ` Chris Wilson
2015-05-21 13:07         ` Daniel Vetter
2015-05-21 13:13           ` Chris Wilson
2015-05-21 14:21             ` Daniel Vetter
2015-05-21 15:22               ` [Intel-gfx] " Chris Wilson
2015-05-21 15:30                 ` Daniel Vetter [this message]
2015-05-26  8:00                   ` Daniel Vetter
2015-05-21 20:29         ` Jesse Barnes
2015-05-14 11:52 ` shuang.he

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