Re: [PATCH 03/13] drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failing

From: Daniel Vetter <daniel@ffwll.ch>
To: Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 03/13] drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failing
Date: Thu, 28 May 2015 09:48:59 +0200	[thread overview]
Message-ID: <20150528074859.GT8341@phenom.ffwll.local> (raw)
In-Reply-To: <1431020329-11414-4-git-send-email-damien.lespiau@intel.com>

On Thu, May 07, 2015 at 06:38:39PM +0100, Damien Lespiau wrote:
> This helps debugging.
> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index da7aa0f..ff5eb05 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1190,7 +1190,8 @@ found:
>  	}
>  
>  	if (min_dco_index > 2) {
> -		WARN(1, "No valid values found for the given pixel clock\n");
> +		WARN(1, "No valid parameters found for pixel clock: %dHz\n",
> +		     clock);

Same complaint here, this should return false and get forwarded eventually
to haswell_crtc_compute_clock. I'll leave patch 2&3 for now since they
need to be reworked anyway.
-Daniel

>  	} else {
>  		wrpll_params->central_freq = dco_central_freq[min_dco_index];
>  
> -- 
> 2.1.0
> 
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> Intel-gfx@lists.freedesktop.org
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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