From: Daniel Vetter <daniel@ffwll.ch>
To: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [RFC 06/14] drm/i915: Disable vlank interrupt for disabling MIPI cmd mode
Date: Fri, 29 May 2015 19:14:43 +0200 [thread overview]
Message-ID: <20150529171443.GR8341@phenom.ffwll.local> (raw)
In-Reply-To: <1432895827-5185-7-git-send-email-gaurav.k.singh@intel.com>
On Fri, May 29, 2015 at 04:06:58PM +0530, Gaurav K Singh wrote:
> vblank interrupt should be disabled before starting the disable
> sequence for MIPI command mode. Otherwise when pipe is disabled
> TE interurpt will be still handled and one memory write command
> will be sent with pipe disabled. This makes the pipe hw to get
> stuck and it doesn't recover in the next enable sequence causing
> display blank out.
>
> Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dsi.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 04d8ce0..aeea289 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -513,11 +513,25 @@ static void intel_dsi_enable_nop(struct intel_encoder *encoder)
>
> static void intel_dsi_pre_disable(struct intel_encoder *encoder)
> {
> + struct drm_device *dev = encoder->base.dev;
> struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
> + struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
> + int pipe = intel_crtc->pipe;
> enum port port;
>
> DRM_DEBUG_KMS("\n");
>
> + if (is_cmd_mode(intel_dsi)) {
> + dev->driver->disable_vblank(dev, pipe);
> +
> + /*
> + * Make sure that the last frame is sent otherwise pipe can get
> + * stuck. Currently providing delay time for ~2 vblanks
> + * assuming 60fps.
> + */
> + mdelay(40);
> + }
Nope. You need to move around the drm_vblank_off suitably, only that
function correctly handles all the book-keeping around vblank interrupts.
If this doesn't work out because of ordering we need to dig into this and
figure out something. Worst case we need to push the drm_vblank_off call
into encoder callbacks for everyone. That's something we already discussed
but then decided against.
-Daniel
> +
> if (is_vid_mode(intel_dsi)) {
> /* Send Shutdown command to the panel in LP mode */
> for_each_dsi_port(port, intel_dsi->ports)
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-05-29 17:12 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-29 10:36 [RFC 00/14] DSI Command mode(DBI mode) enabling on CHT Gaurav K Singh
2015-05-29 10:36 ` [RFC 01/14] drm/i915: allocate gem memory for mipi dbi cmd buffer Gaurav K Singh
2015-05-29 10:59 ` Ville Syrjälä
2015-05-29 17:10 ` Daniel Vetter
2015-06-01 11:03 ` Ville Syrjälä
2015-06-15 10:30 ` Daniel Vetter
2015-06-16 17:08 ` Singh, Gaurav K
2015-06-18 22:02 ` {Intel-gfx] " Gaurav K Singh
2015-06-18 22:06 ` Singh, Gaurav K
2015-05-29 10:36 ` [RFC 02/14] drm/i915: Add support for TEAR ON Sequence Gaurav K Singh
2015-05-29 10:36 ` [RFC 03/14] drm/i915: Add functions for dcs memory write cmd Gaurav K Singh
2015-05-29 10:36 ` [RFC 04/14] drm/i915: Calculate bw timer for mipi DBI interface Gaurav K Singh
2015-05-29 10:36 ` [RFC 05/14] drm/i915: Use the bpp value wrt the pixel format Gaurav K Singh
2015-05-29 10:36 ` [RFC 06/14] drm/i915: Disable vlank interrupt for disabling MIPI cmd mode Gaurav K Singh
2015-05-29 17:14 ` Daniel Vetter [this message]
2015-05-29 17:23 ` Daniel Vetter
2015-06-16 16:54 ` Singh, Gaurav K
2015-06-17 11:36 ` Daniel Vetter
2015-06-18 21:49 ` Gaurav K Singh
2015-06-22 11:58 ` Daniel Vetter
2015-05-29 10:36 ` [RFC 07/14] drm/i915: Disable MIPI display self refresh mode Gaurav K Singh
2015-05-29 17:16 ` Daniel Vetter
2015-05-29 17:20 ` Daniel Vetter
2015-06-16 16:59 ` Singh, Gaurav K
2015-06-18 21:53 ` Gaurav K Singh
2015-06-22 12:04 ` Daniel Vetter
2015-05-29 10:37 ` [RFC 08/14] drm/i915: Disable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-05-29 10:37 ` [RFC 09/14] drm/i915: Changes for command mode preparation Gaurav K Singh
2015-05-29 10:37 ` [RFC 10/14] drm/i915: Enable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-05-29 10:37 ` [RFC 11/14] drm/i915: Enable MIPI display self refresh mode Gaurav K Singh
2015-05-29 17:21 ` Daniel Vetter
2015-06-13 6:54 ` Mohan Marimuthu, Yogesh
2015-06-15 10:33 ` Daniel Vetter
2015-06-16 17:03 ` Singh, Gaurav K
2015-06-17 11:39 ` Daniel Vetter
2015-06-18 21:56 ` Gaurav K Singh
2015-06-22 12:05 ` Daniel Vetter
2015-06-22 12:08 ` Daniel Vetter
2015-05-29 10:37 ` [RFC 12/14] drm/i915: Generalize DSI enable function Gaurav K Singh
2015-05-29 10:37 ` [RFC 13/14] drm/i915: Reset the display hw if vid mode to cmd mode Gaurav K Singh
2015-05-29 10:37 ` [RFC 14/14] drm/i915: send one frame after enabling mipi " Gaurav K Singh
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