From: Daniel Vetter <daniel@ffwll.ch>
To: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [RFC 07/14] drm/i915: Disable MIPI display self refresh mode
Date: Fri, 29 May 2015 19:16:36 +0200 [thread overview]
Message-ID: <20150529171636.GS8341@phenom.ffwll.local> (raw)
In-Reply-To: <1432895827-5185-8-git-send-email-gaurav.k.singh@intel.com>
On Fri, May 29, 2015 at 04:06:59PM +0530, Gaurav K Singh wrote:
> During disable sequence for MIPI encoder in command mode, disable
> MIPI display self-refresh mode bit in Pipe Ctrl reg.
>
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
> Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 895d7c7..cab2ac8 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2171,6 +2171,9 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
> static void intel_disable_pipe(struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
> + struct intel_encoder *encoder;
> + struct intel_dsi *intel_dsi;
> + struct drm_device *dev = crtc->base.dev;
> enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
> enum pipe pipe = crtc->pipe;
> int reg;
> @@ -2189,6 +2192,16 @@ static void intel_disable_pipe(struct intel_crtc *crtc)
> if ((val & PIPECONF_ENABLE) == 0)
> return;
>
> + for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
> + if (encoder->type == INTEL_OUTPUT_DSI) {
> + intel_dsi = enc_to_intel_dsi(&encoder->base);
> + if (intel_dsi && (intel_dsi->operation_mode ==
> + INTEL_DSI_COMMAND_MODE))
> + val = val & ~PIPECONF_MIPI_DSR_ENABLE;
> + break;
> + }
> + }
This must be moved into a suitable encoder callback. Yes the ddi code is
full of cases where encoder stuff is done from the generic crtc code. But
we now have 2 completely different kinds of ports on bxt (ddi and dsi),
and we need to get some solid structure into the code again.
-Daniel
> +
> /*
> * Double wide has implications for planes
> * so best keep it disabled when not needed.
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-05-29 17:14 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-29 10:36 [RFC 00/14] DSI Command mode(DBI mode) enabling on CHT Gaurav K Singh
2015-05-29 10:36 ` [RFC 01/14] drm/i915: allocate gem memory for mipi dbi cmd buffer Gaurav K Singh
2015-05-29 10:59 ` Ville Syrjälä
2015-05-29 17:10 ` Daniel Vetter
2015-06-01 11:03 ` Ville Syrjälä
2015-06-15 10:30 ` Daniel Vetter
2015-06-16 17:08 ` Singh, Gaurav K
2015-06-18 22:02 ` {Intel-gfx] " Gaurav K Singh
2015-06-18 22:06 ` Singh, Gaurav K
2015-05-29 10:36 ` [RFC 02/14] drm/i915: Add support for TEAR ON Sequence Gaurav K Singh
2015-05-29 10:36 ` [RFC 03/14] drm/i915: Add functions for dcs memory write cmd Gaurav K Singh
2015-05-29 10:36 ` [RFC 04/14] drm/i915: Calculate bw timer for mipi DBI interface Gaurav K Singh
2015-05-29 10:36 ` [RFC 05/14] drm/i915: Use the bpp value wrt the pixel format Gaurav K Singh
2015-05-29 10:36 ` [RFC 06/14] drm/i915: Disable vlank interrupt for disabling MIPI cmd mode Gaurav K Singh
2015-05-29 17:14 ` Daniel Vetter
2015-05-29 17:23 ` Daniel Vetter
2015-06-16 16:54 ` Singh, Gaurav K
2015-06-17 11:36 ` Daniel Vetter
2015-06-18 21:49 ` Gaurav K Singh
2015-06-22 11:58 ` Daniel Vetter
2015-05-29 10:36 ` [RFC 07/14] drm/i915: Disable MIPI display self refresh mode Gaurav K Singh
2015-05-29 17:16 ` Daniel Vetter [this message]
2015-05-29 17:20 ` Daniel Vetter
2015-06-16 16:59 ` Singh, Gaurav K
2015-06-18 21:53 ` Gaurav K Singh
2015-06-22 12:04 ` Daniel Vetter
2015-05-29 10:37 ` [RFC 08/14] drm/i915: Disable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-05-29 10:37 ` [RFC 09/14] drm/i915: Changes for command mode preparation Gaurav K Singh
2015-05-29 10:37 ` [RFC 10/14] drm/i915: Enable Tearing effect trigger by GPIO pin Gaurav K Singh
2015-05-29 10:37 ` [RFC 11/14] drm/i915: Enable MIPI display self refresh mode Gaurav K Singh
2015-05-29 17:21 ` Daniel Vetter
2015-06-13 6:54 ` Mohan Marimuthu, Yogesh
2015-06-15 10:33 ` Daniel Vetter
2015-06-16 17:03 ` Singh, Gaurav K
2015-06-17 11:39 ` Daniel Vetter
2015-06-18 21:56 ` Gaurav K Singh
2015-06-22 12:05 ` Daniel Vetter
2015-06-22 12:08 ` Daniel Vetter
2015-05-29 10:37 ` [RFC 12/14] drm/i915: Generalize DSI enable function Gaurav K Singh
2015-05-29 10:37 ` [RFC 13/14] drm/i915: Reset the display hw if vid mode to cmd mode Gaurav K Singh
2015-05-29 10:37 ` [RFC 14/14] drm/i915: send one frame after enabling mipi " Gaurav K Singh
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