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From: Daniel Vetter <daniel@ffwll.ch>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] drm: Avoid the double clflush on the last cache line in drm_clflush_virt_range()
Date: Thu, 18 Jun 2015 17:37:47 +0200	[thread overview]
Message-ID: <20150618153747.GK7752@phenom.ffwll.local> (raw)
In-Reply-To: <1434641478.30307.32.camel@intel.com>

On Thu, Jun 18, 2015 at 06:31:18PM +0300, Imre Deak wrote:
> On to, 2015-06-11 at 09:33 +0100, Chris Wilson wrote:
> > On Thu, Jun 11, 2015 at 09:25:16AM +0100, Dave Gordon wrote:
> > > On 10/06/15 15:58, Chris Wilson wrote:
> > > > As the clflush operates on cache lines, and we can flush any byte
> > > > address, in order to flush all bytes given in the range we issue an
> > > > extra clflush on the last byte to ensure the last cacheline is flushed.
> > > > We can can the iteration to be over the actual cache lines to avoid this
> > > > double clflush on the last byte.
> > > > 
> > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > > Cc: Imre Deak <imre.deak@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/drm_cache.c | 5 +++--
> > > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
> > > > index 9a62d7a53553..6743ff7dccfa 100644
> > > > --- a/drivers/gpu/drm/drm_cache.c
> > > > +++ b/drivers/gpu/drm/drm_cache.c
> > > > @@ -130,11 +130,12 @@ drm_clflush_virt_range(void *addr, unsigned long length)
> > > >  {
> > > >  #if defined(CONFIG_X86)
> > > >  	if (cpu_has_clflush) {
> > > > +		const int size = boot_cpu_data.x86_clflush_size;
> > > >  		void *end = addr + length;
> > > > +		addr = (void *)(((unsigned long)addr) & -size);
> > > 
> > > Should this cast be to uintptr_t?
> > 
> > The kernel has a strict equivalence between sizeof(unsigned long) and
> > sizeof(pointer). You will see unsigned long used universally to pass
> > along pointers to functions and as closures.
> > 
> > > Or intptr_t, as size has somewhat
> > > strangely been defined as signed? To complete the mix, x86_clflush_size
> > > is 'u16'! So maybe we should write
> > > 
> > > +		const size_t size = boot_cpu_data.x86_clflush_size;
> > > +		const size_t mask = ~(size - 1);
> > >  		void *end = addr + length;
> > > +		addr = (void *)(((uintptr_t)addr) & mask);
> > 
> > No. size_t has very poor definition inside the kernel - what does the
> > maximum size of a userspace allocation have to do with kernel internals?
> > 
> > Let's keep userspace types in userspace, or else we end up with
> > i915_gem_gtt.c.
> 
> I also think using unsigned long for virtual addresses is standard in
> the kernel and I can't see how using int would lead to problems given
> the expected range of x86_clflush_size, so this looks ok to me:
> Reviewed-by: Imre Deak <imre.deak@intel.com>

Applied to drm-misc, thanks.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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      reply	other threads:[~2015-06-18 15:35 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-10 14:58 [PATCH] drm: Avoid the double clflush on the last cache line in drm_clflush_virt_range() Chris Wilson
2015-06-11  8:25 ` Dave Gordon
2015-06-11  8:33   ` Chris Wilson
2015-06-18 15:31     ` [Intel-gfx] " Imre Deak
2015-06-18 15:37       ` Daniel Vetter [this message]

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