From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Arun Siluvery <arun.siluvery@linux.intel.com>,
intel-gfx@lists.freedesktop.org,
Dave Gordon <david.s.gordon@intel.com>,
Rafael Barbalho <rafael.barbalho@intel.com>
Subject: Re: [PATCH v6 4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround
Date: Mon, 22 Jun 2015 17:41:22 +0200 [thread overview]
Message-ID: <20150622154122.GZ25769@phenom.ffwll.local> (raw)
In-Reply-To: <20150619181221.GG29508@nuc-i3427.alporthouse.com>
On Fri, Jun 19, 2015 at 07:12:21PM +0100, Chris Wilson wrote:
> On Fri, Jun 19, 2015 at 06:37:13PM +0100, Arun Siluvery wrote:
> > In Indirect context w/a batch buffer,
> > +WaFlushCoherentL3CacheLinesAtContextSwitch:bdw
> >
> > v2: Add LRI commands to set/reset bit that invalidates coherent lines,
> > update WA to include programming restrictions and exclude CHV as
> > it is not required (Ville)
> >
> > v3: Avoid unnecessary read when it can be done by reading register once (Chris).
> >
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Dave Gordon <david.s.gordon@intel.com>
> > Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
> > Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
>
> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Merged up to this patch, thanks.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-06-22 15:38 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-19 17:37 [PATCH v6 0/6] Add Per-context WA using WA batch buffers Arun Siluvery
2015-06-19 17:37 ` [PATCH v6 1/6] drm/i915/gen8: Add infrastructure to initialize " Arun Siluvery
2015-06-19 17:50 ` Chris Wilson
2015-06-22 15:36 ` Daniel Vetter
2015-06-22 15:37 ` Siluvery, Arun
2015-06-19 17:37 ` [PATCH v6 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode Arun Siluvery
2015-06-19 17:58 ` Chris Wilson
2015-06-19 17:37 ` [PATCH v6 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround Arun Siluvery
2015-06-19 18:11 ` Chris Wilson
2015-06-19 17:37 ` [PATCH v6 4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround Arun Siluvery
2015-06-19 18:12 ` Chris Wilson
2015-06-22 15:41 ` Daniel Vetter [this message]
2015-06-19 17:37 ` [PATCH v6 5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround Arun Siluvery
2015-06-19 18:09 ` Chris Wilson
2015-06-22 11:29 ` Siluvery, Arun
2015-06-22 15:39 ` Daniel Vetter
2015-06-23 14:46 ` [PATCH v6 5/5] " Arun Siluvery
2015-06-23 15:14 ` Chris Wilson
2015-06-23 21:22 ` Daniel Vetter
2015-06-19 17:37 ` [PATCH v6 6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround Arun Siluvery
2015-06-22 11:30 ` Siluvery, Arun
2015-06-22 16:21 ` Ville Syrjälä
2015-06-22 16:59 ` Siluvery, Arun
2015-06-23 14:48 ` Siluvery, Arun
2015-06-19 18:07 ` [PATCH v6 1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers Arun Siluvery
2015-06-22 15:41 ` Daniel Vetter
2015-06-22 15:43 ` Siluvery, Arun
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