From: Daniel Vetter <daniel@ffwll.ch>
To: Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/6] drm/i915/skl: Print the DMC firmware status in debugfs
Date: Wed, 1 Jul 2015 15:16:24 +0200 [thread overview]
Message-ID: <20150701131624.GI23343@phenom.ffwll.local> (raw)
In-Reply-To: <1435688939-26523-2-git-send-email-damien.lespiau@intel.com>
On Tue, Jun 30, 2015 at 07:28:54PM +0100, Damien Lespiau wrote:
> Create a new debufs file for it, we'll have a few more things to add
> there.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 31d8768..df35448 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2598,6 +2598,27 @@ static int i915_power_domain_info(struct seq_file *m, void *unused)
> return 0;
> }
>
> +static int i915_dmc_info(struct seq_file *m, void *unused)
> +{
> +
> + struct drm_info_node *node = m->private;
> + struct drm_device *dev = node->minor->dev;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + static const char *csr_state_str[] = { "unknown", "loaded", "error" };
> + enum csr_state csr_state;
> +
> +
> + if (!HAS_CSR(dev)) {
> + seq_puts(m, "not supported\n");
> + return 0;
> + }
> +
> + csr_state = intel_csr_load_status_get(dev_priv);
This will disappear after the dmc loader rework.
-Daniel
> + seq_printf(m, "status: %s\n", csr_state_str[csr_state]);
> +
> + return 0;
> +}
> +
> static void intel_seq_print_mode(struct seq_file *m, int tabs,
> struct drm_display_mode *mode)
> {
> @@ -5068,6 +5089,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
> {"i915_energy_uJ", i915_energy_uJ, 0},
> {"i915_runtime_pm_status", i915_runtime_pm_status, 0},
> {"i915_power_domain_info", i915_power_domain_info, 0},
> + {"i915_dmc_info", i915_dmc_info, 0},
> {"i915_display_info", i915_display_info, 0},
> {"i915_semaphore_status", i915_semaphore_status, 0},
> {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Intel-gfx mailing list
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next prev parent reply other threads:[~2015-07-01 13:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-30 18:28 [PATCH 0/6] A bit of debug info for DMC/CSR Damien Lespiau
2015-06-30 18:28 ` [PATCH 1/6] drm/i915/skl: Print the DMC firmware status in debugfs Damien Lespiau
2015-07-01 13:16 ` Daniel Vetter [this message]
2015-07-01 13:17 ` Damien Lespiau
2015-06-30 18:28 ` [PATCH 2/6] drm/i915/skl: Store and print the DMC firmware version we load Damien Lespiau
2015-06-30 18:28 ` [PATCH 3/6] drm/i915/skl: Expose DC5/DC6 entry counts Damien Lespiau
2015-06-30 18:28 ` [PATCH 4/6] drm/i915/skl: Embed the CSR lock into its own structure Damien Lespiau
2015-07-01 13:16 ` Daniel Vetter
2015-06-30 18:28 ` [PATCH 5/6] drm/i915/skl: Print out if we allow DC5/DC6 in debugfs Damien Lespiau
2015-06-30 18:28 ` [PATCH 6/6] drm/i915/bxt: Print out if we allow DC9 " Damien Lespiau
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