From: Dan Carpenter <dan.carpenter@oracle.com>
To: arun.siluvery@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: drm/i915: Update WaFlushCoherentL3CacheLinesAtContextSwitch
Date: Fri, 10 Jul 2015 11:25:28 +0300 [thread overview]
Message-ID: <20150710082528.GB29999@mwanda> (raw)
Hello Arun Siluvery,
The patch 9e00084750c0: "drm/i915: Update
WaFlushCoherentL3CacheLinesAtContextSwitch" from Jul 3, 2015, leads
to the following static checker warning:
drivers/gpu/drm/i915/intel_lrc.c:1188 gen8_init_indirectctx_bb()
warn: unsigned 'index' is never less than zero.
drivers/gpu/drm/i915/intel_lrc.c
1174 static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
1175 struct i915_wa_ctx_bb *wa_ctx,
1176 uint32_t *const batch,
1177 uint32_t *offset)
1178 {
1179 uint32_t scratch_addr;
1180 uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);
1181
1182 /* WaDisableCtxRestoreArbitration:bdw,chv */
1183 wa_ctx_emit(batch, index, MI_ARB_ON_OFF | MI_ARB_DISABLE);
1184
1185 /* WaFlushCoherentL3CacheLinesAtContextSwitch:bdw */
1186 if (IS_BROADWELL(ring->dev)) {
1187 index = gen8_emit_flush_coherentl3_wa(ring, batch, index);
1188 if (index < 0)
^^^^^^^^^
Never true.
1189 return index;
1190 }
1191
regards,
dan carpenter
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next reply other threads:[~2015-07-10 8:25 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-10 8:25 Dan Carpenter [this message]
2015-07-10 11:56 ` drm/i915: Update WaFlushCoherentL3CacheLinesAtContextSwitch Siluvery, Arun
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