Updated drm-intel-testing

Daniel Vetter
2015-08-28T16:08:58Z

Somehow I've forgotten to do a new dinq tag 2 weeks ago, so this covers 4 weeks.
Still not all that much due to vacation:
- PML4 pagetable support for 48b from Michel Thierry
- more fixes for sink crc from Rodrigo
- DP link settings cleanup from Ville
- GuC-based command submission from Alex Dai and Dave Gordon
- dpll cleanups for chv from Ville
- max pixel clock checking from Mika Kahola
- cleanup hpd bits handling (Jani)
- more power well trickery for chv from Ville

Happy testing!

Cheers, Daniel

--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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