Re: [PATCH] drm/i915/vlv: Add RPS debugfs disabling for vlv/chv

[Daniel Vetter <daniel@ffwll.ch>]

On Mon, Aug 03, 2015 at 03:01:01PM +0530, Praveen Paneri wrote:
> This patch exposes a new debugfs interface 'i915_rps_disable'
> Following 2 values shall be echoed into this file.
> '0' - RPS explicitly enabled .
> '1' - RPS explicitly disabled.
> 
> This interface provides capabilty to enable/disable Turbo feature
> at runtime, which is needed for its validation.
> 
> Signed-off-by: Deepak S <deepak.s@intel.com>
> Signed-off-by: Praveen Paneri <praveen.paneri@intel.com>

If you need this for validation I want to see that validation test commit
to igt.

Thanks, Daniel

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 55 +++++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/i915_drv.h     |  2 ++
>  2 files changed, 57 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 23a69307..9124654 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -4771,6 +4771,60 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
>  			i915_min_freq_get, i915_min_freq_set,
>  			"%llu\n");
>  
> +static int i915_rps_disable_get(void *data, u64 *val)
> +{
> +	struct drm_device *dev = data;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
> +	if (!IS_VALLEYVIEW(dev))
> +		return -ENODEV;
> +
> +	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> +
> +	*val = dev_priv->rps.rps_disable;
> +
> +	return 0;
> +}
> +
> +static int i915_rps_disable_set(void *data, u64 val)
> +{
> +	struct drm_device *dev = data;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	int ret;
> +
> +	if (!IS_VALLEYVIEW(dev))
> +		return -ENODEV;
> +
> +	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> +
> +	DRM_DEBUG_DRIVER("Setting RPS disable %s\n",
> +			 val ? "true" : "false");
> +
> +	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
> +	if (ret)
> +		return ret;
> +
> +	dev_priv->rps.rps_disable = val;
> +
> +	if (val)
> +		I915_WRITE(GEN6_RP_CONTROL, 0);
> +	else
> +		I915_WRITE(GEN6_RP_CONTROL, GEN6_RP_MEDIA_TURBO |
> +				GEN6_RP_MEDIA_HW_NORMAL_MODE |
> +				GEN6_RP_MEDIA_IS_GFX |
> +				GEN6_RP_ENABLE |
> +				GEN6_RP_UP_BUSY_AVG |
> +				GEN6_RP_DOWN_IDLE_CONT);
> +
> +	mutex_unlock(&dev_priv->rps.hw_lock);
> +
> +	return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(i915_rps_disable_fops,
> +			i915_rps_disable_get, i915_rps_disable_set,
> +			"%llu\n");
> +
>  static int
>  i915_cache_sharing_get(void *data, u64 *val)
>  {
> @@ -5107,6 +5161,7 @@ static const struct i915_debugfs_files {
>  	{"i915_wedged", &i915_wedged_fops},
>  	{"i915_max_freq", &i915_max_freq_fops},
>  	{"i915_min_freq", &i915_min_freq_fops},
> +	{"i915_rps_disable", &i915_rps_disable_fops},
>  	{"i915_cache_sharing", &i915_cache_sharing_fops},
>  	{"i915_ring_stop", &i915_ring_stop_fops},
>  	{"i915_ring_missed_irq", &i915_ring_missed_irq_fops},
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 04aa34a..e2a57f0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1137,6 +1137,8 @@ struct intel_gen6_power_mgmt {
>  	u8 up_threshold; /* Current %busy required to uplock */
>  	u8 down_threshold; /* Current %busy required to downclock */
>  
> +	bool rps_disable;
> +
>  	int last_adj;
>  	enum { LOW_POWER, BETWEEN, HIGH_POWER } power;
>  
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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