From: Daniel Vetter <daniel@ffwll.ch>
To: Michel Thierry <michel.thierry@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: Use masked write for Context Status Buffer Pointer
Date: Thu, 6 Aug 2015 18:03:10 +0200 [thread overview]
Message-ID: <20150806160310.GC17734@phenom.ffwll.local> (raw)
In-Reply-To: <55C36E73.6040306@intel.com>
On Thu, Aug 06, 2015 at 03:25:55PM +0100, Michel Thierry wrote:
> On 8/6/2015 3:00 PM, Mika Kuoppala wrote:
> >This register needs to be updated with masked writes.
> >
> >Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> >---
> > drivers/gpu/drm/i915/intel_lrc.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >index 99bba8e..29347e7 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.c
> >+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >@@ -521,7 +521,7 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
> > ring->next_context_status_buffer = write_pointer % 6;
> >
> > I915_WRITE(RING_CONTEXT_STATUS_PTR(ring),
> >- ((u32)ring->next_context_status_buffer & 0x07) << 8);
> >+ _MASKED_FIELD(0x07 << 8, ((u32)ring->next_context_status_buffer & 0x07) << 8));
> > }
> >
> > static int execlists_context_queue(struct drm_i915_gem_request *request)
> >--
> >2.1.4
> >
>
> bspec agrees... but I remember seeing these bits being written without the
> mask in gen8.
Impact? Do I need this for -fixes with cc: stable? lrc is shipping as
released code, please be a bit more elaborate in your commit messages.
Thanks, Daniel
> Reviewed-by: Michel Thierry <michel.thierry@intel.com>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-08-06 16:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-06 14:00 [PATCH] drm/i915: Use masked write for Context Status Buffer Pointer Mika Kuoppala
2015-08-06 14:25 ` Michel Thierry
2015-08-06 16:03 ` Daniel Vetter [this message]
2015-08-06 16:19 ` Michel Thierry
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150806160310.GC17734@phenom.ffwll.local \
--to=daniel@ffwll.ch \
--cc=intel-gfx@lists.freedesktop.org \
--cc=michel.thierry@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox