From: Daniel Vetter <daniel@ffwll.ch>
To: Tiago Vignatti <tiago.vignatti@intel.com>
Cc: daniel.thompson@linaro.org, daniel.vetter@ffwll.ch,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 3/7] prime_mmap: Add basic tests to write in a bo using CPU
Date: Thu, 13 Aug 2015 09:01:47 +0200 [thread overview]
Message-ID: <20150813070147.GU17734@phenom.ffwll.local> (raw)
In-Reply-To: <1439422160-20148-8-git-send-email-tiago.vignatti@intel.com>
On Wed, Aug 12, 2015 at 08:29:16PM -0300, Tiago Vignatti wrote:
> This patch adds test_correct_cpu_write, which maps the texture buffer through a
> prime fd and then writes directly to it using the CPU. It stresses the driver
> to guarantee cache synchronization among the different domains.
>
> This test also adds test_forked_cpu_write, which creates the GEM bo in one
> process and pass the prime handle of the it to another process, which in turn
> uses the handle only to map and write. Grossly speaking this test simulates
> Chrome OS architecture, where the Web content ("unpriviledged process") maps
> and CPU-draws a buffer, which was previously allocated in the GPU process
> ("priviledged process").
>
> This requires kernel modifications (Daniel Thompson's "drm: prime: Honour
> O_RDWR during prime-handle-to-fd").
>
> Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com>
Squash with previous patch?
> ---
> lib/ioctl_wrappers.c | 5 +++-
> tests/prime_mmap.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 69 insertions(+), 1 deletion(-)
>
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index 53bd635..941fa66 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -1125,6 +1125,9 @@ void gem_require_ring(int fd, int ring_id)
>
> /* prime */
>
> +#ifndef DRM_RDWR
> +#define DRM_RDWR O_RDWR
> +#endif
> /**
> * prime_handle_to_fd:
> * @fd: open i915 drm file descriptor
> @@ -1142,7 +1145,7 @@ int prime_handle_to_fd(int fd, uint32_t handle)
>
> memset(&args, 0, sizeof(args));
> args.handle = handle;
> - args.flags = DRM_CLOEXEC;
> + args.flags = DRM_CLOEXEC | DRM_RDWR;
This needs to be optional otherwise all the existing prime tests start
falling over on older kernels. Probably need a
prime_handle_to_fd_with_mmap, which doesn an igt_skip if it fails.
-Daniel
> args.fd = -1;
>
> do_ioctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args);
> diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
> index dc59e8f..ad91371 100644
> --- a/tests/prime_mmap.c
> +++ b/tests/prime_mmap.c
> @@ -22,6 +22,7 @@
> *
> * Authors:
> * Rob Bradford <rob at linux.intel.com>
> + * Tiago Vignatti <tiago.vignatti at intel.com>
> *
> */
>
> @@ -66,6 +67,12 @@ fill_bo(uint32_t handle, size_t size)
> }
>
> static void
> +fill_bo_cpu(char *ptr)
> +{
> + memcpy(ptr, pattern, sizeof(pattern));
> +}
> +
> +static void
> test_correct(void)
> {
> int dma_buf_fd;
> @@ -180,6 +187,62 @@ test_forked(void)
> gem_close(fd, handle);
> }
>
> +/* test CPU write. This has a rather big implication for the driver which must
> + * guarantee cache synchronization when writing the bo using CPU. */
> +static void
> +test_correct_cpu_write(void)
> +{
> + int dma_buf_fd;
> + char *ptr;
> + uint32_t handle;
> +
> + handle = gem_create(fd, BO_SIZE);
> +
> + dma_buf_fd = prime_handle_to_fd(fd, handle);
> + igt_assert(errno == 0);
> +
> + /* Check correctness of map using write protection (PROT_WRITE) */
> + ptr = mmap(NULL, BO_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, dma_buf_fd, 0);
> + igt_assert(ptr != MAP_FAILED);
> +
> + /* Fill bo using CPU */
> + fill_bo_cpu(ptr);
> +
> + /* Check pattern correctness */
> + igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0);
> +
> + munmap(ptr, BO_SIZE);
> + close(dma_buf_fd);
> + gem_close(fd, handle);
> +}
> +
> +/* map from another process and then write using CPU */
> +static void
> +test_forked_cpu_write(void)
> +{
> + int dma_buf_fd;
> + char *ptr;
> + uint32_t handle;
> +
> + handle = gem_create(fd, BO_SIZE);
> +
> + dma_buf_fd = prime_handle_to_fd(fd, handle);
> + igt_assert(errno == 0);
> +
> + igt_fork(childno, 1) {
> + ptr = mmap(NULL, BO_SIZE, PROT_READ | PROT_WRITE , MAP_SHARED, dma_buf_fd, 0);
> + igt_assert(ptr != MAP_FAILED);
> + fill_bo_cpu(ptr);
> +
> + igt_assert(memcmp(ptr, pattern, sizeof(pattern)) == 0);
> + munmap(ptr, BO_SIZE);
> + close(dma_buf_fd);
> + }
> + close(dma_buf_fd);
> + igt_waitchildren();
> + gem_close(fd, handle);
> +}
> +
> static void
> test_refcounting(void)
> {
> @@ -346,6 +409,8 @@ igt_main
> { "test_map_unmap", test_map_unmap },
> { "test_reprime", test_reprime },
> { "test_forked", test_forked },
> + { "test_correct_cpu_write", test_correct_cpu_write },
> + { "test_forked_cpu_write", test_forked_cpu_write },
> { "test_refcounting", test_refcounting },
> { "test_dup", test_dup },
> { "test_errors", test_errors },
> --
> 2.1.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-08-13 7:01 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-12 23:29 [PATCH v4] mmap on the dma-buf directly Tiago Vignatti
2015-08-12 23:29 ` [PATCH 1/4] drm: prime: Honour O_RDWR during prime-handle-to-fd Tiago Vignatti
2015-08-12 23:29 ` [PATCH 2/4] dma-buf: Add ioctls to allow userspace to flush Tiago Vignatti
2015-08-12 23:29 ` [PATCH 3/4] drm/i915: Implement end_cpu_access Tiago Vignatti
2015-08-23 12:14 ` Chris Wilson
2015-08-12 23:29 ` [PATCH 4/4] drm/i915: Use CPU mapping for userspace dma-buf mmap() Tiago Vignatti
2015-08-23 12:21 ` Chris Wilson
2015-08-12 23:29 ` [PATCH 1/7] prime_mmap: Add new test for calling mmap() on dma-buf fds Tiago Vignatti
2015-08-13 7:04 ` Daniel Vetter
2015-08-14 22:17 ` Tiago Vignatti
2015-08-25 7:46 ` Daniel Vetter
2015-08-12 23:29 ` [PATCH 2/7] prime_mmap: Fix a few misc stuff Tiago Vignatti
2015-08-12 23:29 ` [PATCH 3/7] prime_mmap: Add basic tests to write in a bo using CPU Tiago Vignatti
2015-08-13 7:01 ` Daniel Vetter [this message]
2015-08-13 14:26 ` Tiago Vignatti
2015-08-13 14:48 ` Daniel Vetter
2015-08-12 23:29 ` [PATCH 4/7] lib: Add gem_userptr helpers Tiago Vignatti
2015-08-23 12:10 ` Chris Wilson
2015-08-25 7:47 ` Daniel Vetter
2015-08-12 23:29 ` [PATCH 5/7] prime_mmap: Test for userptr mmap Tiago Vignatti
2015-08-23 12:17 ` Chris Wilson
2015-08-12 23:29 ` [PATCH 6/7] tests: Add kms_mmap_write_crc for cache coherency tests Tiago Vignatti
2015-08-12 23:29 ` [PATCH 7/7] tests/kms_mmap_write_crc: Demonstrate the need for end_cpu_access Tiago Vignatti
2015-08-13 11:09 ` [PATCH v4] mmap on the dma-buf directly Thomas Hellstrom
2015-08-13 14:09 ` Tiago Vignatti
2015-08-13 14:51 ` Daniel Vetter
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