[PATCH 0/4] HBR2 cleanup for CHV/SKL

[PATCH 0/4] HBR2 cleanup for CHV/SKL

[Sivakumar Thulasimani]

From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>

This patch series cleans up the code to remove HBR2 support
for CHV since it is not supported on CHV. Also fixes a bug
for SKL platforms where HBR2 is not supported.

Thulasimani,Sivakumar (4):
  Revert "drm/i915: Add eDP intermediate frequencies for CHV"
  drm/i915: remove HBR2 from chv supported list
  drm/i915: Avoid TP3 on CHV
  drm/i915: fix link rates reported for SKL

 drivers/gpu/drm/i915/intel_dp.c |   43 +++++++++++++++++++++++----------------
 1 file changed, 25 insertions(+), 18 deletions(-)

-- 
1.7.9.5

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[PATCH 1/4] Revert "drm/i915: Add eDP intermediate frequencies for CHV"

[Sivakumar Thulasimani]

From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>

This reverts
commit fe51bfb95c996733150c44d21e1c9f4b6322a326.
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Thu Mar 12 17:10:38 2015 +0200

CHV does not support intermediate frequencies so reverting the
patch that added it in the first place

Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |    6 ------
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b905c19..bfe0567 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -95,9 +95,6 @@ static const int bxt_rates[] = { 162000, 216000, 243000, 270000,
 				  324000, 432000, 540000 };
 static const int skl_rates[] = { 162000, 216000, 270000,
 				  324000, 432000, 540000 };
-static const int chv_rates[] = { 162000, 202500, 210000, 216000,
-				 243000, 270000, 324000, 405000,
-				 420000, 432000, 540000 };
 static const int default_rates[] = { 162000, 270000, 540000 };
 
 /**
@@ -1219,9 +1216,6 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
 	} else if (IS_SKYLAKE(dev)) {
 		*source_rates = skl_rates;
 		return ARRAY_SIZE(skl_rates);
-	} else if (IS_CHERRYVIEW(dev)) {
-		*source_rates = chv_rates;
-		return ARRAY_SIZE(chv_rates);
 	}
 
 	*source_rates = default_rates;
-- 
1.7.9.5

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[PATCH 2/4] drm/i915: remove HBR2 from chv supported list

[Sivakumar Thulasimani]

From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>

This patch removes 5.4Gbps from supported link rate for CHV since
it is not supported in it.

v2: change the ordering for better readability (Ville)

Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index bfe0567..475d8cb 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1220,11 +1220,12 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
 
 	*source_rates = default_rates;
 
+	/* WaDisableHBR2:skl */
 	if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
-		/* WaDisableHBR2:skl */
 		return (DP_LINK_BW_2_7 >> 3) + 1;
-	else if (INTEL_INFO(dev)->gen >= 8 ||
-	    (IS_HASWELL(dev) && !IS_HSW_ULX(dev)))
+
+	if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
+	    (INTEL_INFO(dev)->gen >= 9))
 		return (DP_LINK_BW_5_4 >> 3) + 1;
 	else
 		return (DP_LINK_BW_2_7 >> 3) + 1;
-- 
1.7.9.5

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[PATCH 3/4] drm/i915: Avoid TP3 on CHV

[Sivakumar Thulasimani]

From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>

This patch removes TP3 support on CHV since there is no support
for HBR2 on this platform.

Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |   24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 475d8cb..03523b3 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1207,6 +1207,20 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates)
 	return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
 }
 
+static bool intel_dp_is_hbr2_supported(struct drm_device *dev)
+{
+	/* WaDisableHBR2:skl */
+	if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
+		return false;
+
+	if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
+	    (INTEL_INFO(dev)->gen >= 9))
+		return true;
+	else
+		return false;
+}
+
+
 static int
 intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
 {
@@ -1220,12 +1234,8 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
 
 	*source_rates = default_rates;
 
-	/* WaDisableHBR2:skl */
-	if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
-		return (DP_LINK_BW_2_7 >> 3) + 1;
-
-	if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
-	    (INTEL_INFO(dev)->gen >= 9))
+	/* This depends on the fact that 5.4 is last value in the array */
+	if (intel_dp_is_hbr2_supported(dev))
 		return (DP_LINK_BW_5_4 >> 3) + 1;
 	else
 		return (DP_LINK_BW_2_7 >> 3) + 1;
@@ -3926,7 +3936,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
 	/* Training Pattern 3 support, both source and sink */
 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
 	    intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED &&
-	    (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) {
+	    intel_dp_is_hbr2_supported(dev)) {
 		intel_dp->use_tps3 = true;
 		DRM_DEBUG_KMS("Displayport TPS3 supported\n");
 	} else
-- 
1.7.9.5

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[PATCH 4/4] drm/i915: fix link rates reported for SKL

[Sivakumar Thulasimani]

From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>

This patch fixes the bug that SKL SKUs before B0 might return
HBR2 as supported even though it is not supposed to be enabled
on such platforms.

Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |   14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 03523b3..963fdae 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1224,21 +1224,23 @@ static bool intel_dp_is_hbr2_supported(struct drm_device *dev)
 static int
 intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
 {
+	int size = 0;
 	if (IS_BROXTON(dev)) {
 		*source_rates = bxt_rates;
-		return ARRAY_SIZE(bxt_rates);
+		size = ARRAY_SIZE(bxt_rates);
 	} else if (IS_SKYLAKE(dev)) {
 		*source_rates = skl_rates;
-		return ARRAY_SIZE(skl_rates);
+		size = ARRAY_SIZE(skl_rates);
+	} else {
+		*source_rates = default_rates;
+		size = ARRAY_SIZE(default_rates);
 	}
 
-	*source_rates = default_rates;
-
 	/* This depends on the fact that 5.4 is last value in the array */
 	if (intel_dp_is_hbr2_supported(dev))
-		return (DP_LINK_BW_5_4 >> 3) + 1;
+		return size;
 	else
-		return (DP_LINK_BW_2_7 >> 3) + 1;
+		return size - 1;
 }
 
 static void
-- 
1.7.9.5

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Re: [PATCH 3/4] drm/i915: Avoid TP3 on CHV

[Jani Nikula]

On Mon, 17 Aug 2015, Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> wrote:
> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>
> This patch removes TP3 support on CHV since there is no support
> for HBR2 on this platform.
>
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   24 +++++++++++++++++-------
>  1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 475d8cb..03523b3 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1207,6 +1207,20 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates)
>  	return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
>  }
>  
> +static bool intel_dp_is_hbr2_supported(struct drm_device *dev)

Sorry to be a nitpicker, but I really like how we've started
distinguishing source and sink in such helpers in intel_dp.c, for
example intel_dp_source_rates vs. intel_dp_sink_rates. Similarly I think
you should name this intel_dp_source_supports_hbr2.

BR,
Jani.

> +{
> +	/* WaDisableHBR2:skl */
> +	if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
> +		return false;
> +
> +	if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
> +	    (INTEL_INFO(dev)->gen >= 9))
> +		return true;
> +	else
> +		return false;
> +}
> +
> +
>  static int
>  intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
>  {
> @@ -1220,12 +1234,8 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
>  
>  	*source_rates = default_rates;
>  
> -	/* WaDisableHBR2:skl */
> -	if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0)
> -		return (DP_LINK_BW_2_7 >> 3) + 1;
> -
> -	if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) ||
> -	    (INTEL_INFO(dev)->gen >= 9))
> +	/* This depends on the fact that 5.4 is last value in the array */
> +	if (intel_dp_is_hbr2_supported(dev))
>  		return (DP_LINK_BW_5_4 >> 3) + 1;
>  	else
>  		return (DP_LINK_BW_2_7 >> 3) + 1;
> @@ -3926,7 +3936,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
>  	/* Training Pattern 3 support, both source and sink */
>  	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
>  	    intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED &&
> -	    (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) {
> +	    intel_dp_is_hbr2_supported(dev)) {
>  		intel_dp->use_tps3 = true;
>  		DRM_DEBUG_KMS("Displayport TPS3 supported\n");
>  	} else
> -- 
> 1.7.9.5
>

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 4/4] drm/i915: fix link rates reported for SKL

[Jani Nikula]

On Mon, 17 Aug 2015, Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> wrote:
> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>
> This patch fixes the bug that SKL SKUs before B0 might return
> HBR2 as supported even though it is not supposed to be enabled
> on such platforms.
>
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   14 ++++++++------
>  1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 03523b3..963fdae 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1224,21 +1224,23 @@ static bool intel_dp_is_hbr2_supported(struct drm_device *dev)
>  static int
>  intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
>  {
> +	int size = 0;

No need to initialize.

>  	if (IS_BROXTON(dev)) {
>  		*source_rates = bxt_rates;
> -		return ARRAY_SIZE(bxt_rates);
> +		size = ARRAY_SIZE(bxt_rates);
>  	} else if (IS_SKYLAKE(dev)) {
>  		*source_rates = skl_rates;
> -		return ARRAY_SIZE(skl_rates);
> +		size = ARRAY_SIZE(skl_rates);
> +	} else {
> +		*source_rates = default_rates;
> +		size = ARRAY_SIZE(default_rates);
>  	}
>  
> -	*source_rates = default_rates;
> -
>  	/* This depends on the fact that 5.4 is last value in the array */
>  	if (intel_dp_is_hbr2_supported(dev))
> -		return (DP_LINK_BW_5_4 >> 3) + 1;
> +		return size;
>  	else
> -		return (DP_LINK_BW_2_7 >> 3) + 1;
> +		return size - 1;

  	/* This depends on the fact that 5.4 is last value in the array */
  	if (!intel_dp_source_supports_hbr2(dev))
        	size--;

	return size;
>  }
>  
>  static void
> -- 
> 1.7.9.5
>

-- 
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Re: [PATCH 4/4] drm/i915: fix link rates reported for SKL

[Ville Syrjälä]

On Mon, Aug 17, 2015 at 05:45:11PM +0530, Sivakumar Thulasimani wrote:
> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
> 
> This patch fixes the bug that SKL SKUs before B0 might return
> HBR2 as supported even though it is not supposed to be enabled
> on such platforms.
> 
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c |   14 ++++++++------
>  1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 03523b3..963fdae 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1224,21 +1224,23 @@ static bool intel_dp_is_hbr2_supported(struct drm_device *dev)
>  static int
>  intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
>  {
> +	int size = 0;
>  	if (IS_BROXTON(dev)) {
>  		*source_rates = bxt_rates;
> -		return ARRAY_SIZE(bxt_rates);
> +		size = ARRAY_SIZE(bxt_rates);
>  	} else if (IS_SKYLAKE(dev)) {
>  		*source_rates = skl_rates;
> -		return ARRAY_SIZE(skl_rates);
> +		size = ARRAY_SIZE(skl_rates);
> +	} else {
> +		*source_rates = default_rates;
> +		size = ARRAY_SIZE(default_rates);
>  	}
>  
> -	*source_rates = default_rates;
> -
>  	/* This depends on the fact that 5.4 is last value in the array */
>  	if (intel_dp_is_hbr2_supported(dev))
> -		return (DP_LINK_BW_5_4 >> 3) + 1;
> +		return size;
>  	else
> -		return (DP_LINK_BW_2_7 >> 3) + 1;
> +		return size - 1;

Maybe we should use rate_to_index() here? Should be a bit more
future proof for when we get HBR3. So, perhaps something like this?

{
	...
		*source_rates = bxt_rates;
		size_rates = ARRAY_SIZE(bxt_rates);
	...

	if (intel_dp_is_hbr2_supported)
		max_rate = 540000;
	else
		max_rate = 270000;

	size = rate_to_index(max_rate, *source_rates) + 1;
	if (WARN_ON(size > size_rates))
		size = size_rates;

	return size;
}

But that could be a followup patch.

Otherwise the series looks good so:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  }
>  
>  static void
> -- 
> 1.7.9.5

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH 4/4] drm/i915: fix link rates reported for SKL

[Sivakumar Thulasimani]

On 8/17/2015 6:11 PM, Ville Syrjälä wrote:
> On Mon, Aug 17, 2015 at 05:45:11PM +0530, Sivakumar Thulasimani wrote:
>> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>>
>> This patch fixes the bug that SKL SKUs before B0 might return
>> HBR2 as supported even though it is not supposed to be enabled
>> on such platforms.
>>
>> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_dp.c |   14 ++++++++------
>>   1 file changed, 8 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 03523b3..963fdae 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -1224,21 +1224,23 @@ static bool intel_dp_is_hbr2_supported(struct drm_device *dev)
>>   static int
>>   intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
>>   {
>> +	int size = 0;
>>   	if (IS_BROXTON(dev)) {
>>   		*source_rates = bxt_rates;
>> -		return ARRAY_SIZE(bxt_rates);
>> +		size = ARRAY_SIZE(bxt_rates);
>>   	} else if (IS_SKYLAKE(dev)) {
>>   		*source_rates = skl_rates;
>> -		return ARRAY_SIZE(skl_rates);
>> +		size = ARRAY_SIZE(skl_rates);
>> +	} else {
>> +		*source_rates = default_rates;
>> +		size = ARRAY_SIZE(default_rates);
>>   	}
>>   
>> -	*source_rates = default_rates;
>> -
>>   	/* This depends on the fact that 5.4 is last value in the array */
>>   	if (intel_dp_is_hbr2_supported(dev))
>> -		return (DP_LINK_BW_5_4 >> 3) + 1;
>> +		return size;
>>   	else
>> -		return (DP_LINK_BW_2_7 >> 3) + 1;
>> +		return size - 1;
> Maybe we should use rate_to_index() here? Should be a bit more
> future proof for when we get HBR3. So, perhaps something like this?
>
> {
> 	...
> 		*source_rates = bxt_rates;
> 		size_rates = ARRAY_SIZE(bxt_rates);
> 	...
>
> 	if (intel_dp_is_hbr2_supported)
> 		max_rate = 540000;
> 	else
> 		max_rate = 270000;
>
> 	size = rate_to_index(max_rate, *source_rates) + 1;
> 	if (WARN_ON(size > size_rates))
> 		size = size_rates;
>
> 	return size;
> }
>
> But that could be a followup patch.
>
> Otherwise the series looks good so:
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
thanks for the review :)
>>   }
>>   
>>   static void
>> -- 
>> 1.7.9.5

-- 
regards,
Sivakumar

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[PATCH 4/4] drm/i915: fix link rates reported for SKL

[Sivakumar Thulasimani]

From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>

This patch fixes the bug that SKL SKUs before B0 might return
HBR2 as supported even though it is not supposed to be enabled
on such platforms.

v2: optimize if else condition (Jani)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c |   19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 8bc6361..32bf961 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1224,21 +1224,24 @@ static bool intel_dp_source_supports_hbr2(struct drm_device *dev)
 static int
 intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
 {
+	int size;
+
 	if (IS_BROXTON(dev)) {
 		*source_rates = bxt_rates;
-		return ARRAY_SIZE(bxt_rates);
+		size =  ARRAY_SIZE(bxt_rates);
 	} else if (IS_SKYLAKE(dev)) {
 		*source_rates = skl_rates;
-		return ARRAY_SIZE(skl_rates);
+		size = ARRAY_SIZE(skl_rates);
+	} else {
+		*source_rates = default_rates;
+		size = ARRAY_SIZE(default_rates);
 	}
 
-	*source_rates = default_rates;
-
 	/* This depends on the fact that 5.4 is last value in the array */
-	if (intel_dp_source_supports_hbr2(dev))
-		return (DP_LINK_BW_5_4 >> 3) + 1;
-	else
-		return (DP_LINK_BW_2_7 >> 3) + 1;
+	if (!intel_dp_source_supports_hbr2(dev))
+		size--;
+
+	return size;
 }
 
 static void
-- 
1.7.9.5

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Re: [PATCH 4/4] drm/i915: fix link rates reported for SKL

[Sivakumar Thulasimani]

On 8/17/2015 5:59 PM, Jani Nikula wrote:
> On Mon, 17 Aug 2015, Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> wrote:
>> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>>
>> This patch fixes the bug that SKL SKUs before B0 might return
>> HBR2 as supported even though it is not supposed to be enabled
>> on such platforms.
>>
>> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_dp.c |   14 ++++++++------
>>   1 file changed, 8 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 03523b3..963fdae 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -1224,21 +1224,23 @@ static bool intel_dp_is_hbr2_supported(struct drm_device *dev)
>>   static int
>>   intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
>>   {
>> +	int size = 0;
> No need to initialize.
>
>>   	if (IS_BROXTON(dev)) {
>>   		*source_rates = bxt_rates;
>> -		return ARRAY_SIZE(bxt_rates);
>> +		size = ARRAY_SIZE(bxt_rates);
>>   	} else if (IS_SKYLAKE(dev)) {
>>   		*source_rates = skl_rates;
>> -		return ARRAY_SIZE(skl_rates);
>> +		size = ARRAY_SIZE(skl_rates);
>> +	} else {
>> +		*source_rates = default_rates;
>> +		size = ARRAY_SIZE(default_rates);
>>   	}
>>   
>> -	*source_rates = default_rates;
>> -
>>   	/* This depends on the fact that 5.4 is last value in the array */
>>   	if (intel_dp_is_hbr2_supported(dev))
>> -		return (DP_LINK_BW_5_4 >> 3) + 1;
>> +		return size;
>>   	else
>> -		return (DP_LINK_BW_2_7 >> 3) + 1;
>> +		return size - 1;
>    	/* This depends on the fact that 5.4 is last value in the array */
>    	if (!intel_dp_source_supports_hbr2(dev))
>          	size--;
>
> 	return size;
uploaded v2 of patches 3 & 4.
thanks for the review :)

>>   }
>>   
>>   static void
>> -- 
>> 1.7.9.5
>>

-- 
regards,
Sivakumar

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Re: [PATCH 4/4] drm/i915: fix link rates reported for SKL

[shuang.he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 7216
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                 -1              283/283              282/283
SNB                                  315/315              315/315
IVB                                  336/336              336/336
BYT                                  283/283              283/283
HSW                                  378/378              378/378
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*ILK  igt@kms_flip@flip-vs-dpms-interruptible      PASS(1)      DMESG_WARN(1)
Note: You need to pay more attention to line start with '*'
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Re: [PATCH 4/4] drm/i915: fix link rates reported for SKL

[Jani Nikula]

On Tue, 18 Aug 2015, Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> wrote:
> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>
> This patch fixes the bug that SKL SKUs before B0 might return
> HBR2 as supported even though it is not supposed to be enabled
> on such platforms.
>
> v2: optimize if else condition (Jani)
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>

Pushed to drm-intel-next-fixes, thanks for the patch and review.

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/intel_dp.c |   19 +++++++++++--------
>  1 file changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 8bc6361..32bf961 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1224,21 +1224,24 @@ static bool intel_dp_source_supports_hbr2(struct drm_device *dev)
>  static int
>  intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
>  {
> +	int size;
> +
>  	if (IS_BROXTON(dev)) {
>  		*source_rates = bxt_rates;
> -		return ARRAY_SIZE(bxt_rates);
> +		size =  ARRAY_SIZE(bxt_rates);
>  	} else if (IS_SKYLAKE(dev)) {
>  		*source_rates = skl_rates;
> -		return ARRAY_SIZE(skl_rates);
> +		size = ARRAY_SIZE(skl_rates);
> +	} else {
> +		*source_rates = default_rates;
> +		size = ARRAY_SIZE(default_rates);
>  	}
>  
> -	*source_rates = default_rates;
> -
>  	/* This depends on the fact that 5.4 is last value in the array */
> -	if (intel_dp_source_supports_hbr2(dev))
> -		return (DP_LINK_BW_5_4 >> 3) + 1;
> -	else
> -		return (DP_LINK_BW_2_7 >> 3) + 1;
> +	if (!intel_dp_source_supports_hbr2(dev))
> +		size--;
> +
> +	return size;
>  }
>  
>  static void
> -- 
> 1.7.9.5
>

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 4/4] drm/i915: fix link rates reported for SKL

[shuang.he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 7225
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                 -1              302/302              301/302
SNB                                  315/315              315/315
IVB                                  336/336              336/336
BYT                                  283/283              283/283
HSW                                  378/378              378/378
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*ILK  igt@kms_flip@wf_vblank-vs-modeset-interruptible      PASS(1)      DMESG_WARN(1)
Note: You need to pay more attention to line start with '*'
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