[PATCH v2 00/17] drm/i915: Port A HPD and other HPD cleanups

[PATCH v2 00/17] drm/i915: Port A HPD and other HPD cleanups

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Second posting of the HPD port A series, with some new added goodies
at the end ;)

I tried to accomodate Paulo's review comments on v1 of the series [1]
and noticed a few other warts myself that I tried to sort out. Additonally
I added a bunch of BXT cleanups to the end, and an extra regression
fix for gen2-4.

I've not had time to test this version yet. I'll try to do that soon,
and especially give it a shakedown on a BXT.

The entire series is available at
git://github.com/vsyrjala/linux.git port_a_hotplug_7

[1] http://lists.freedesktop.org/archives/intel-gfx/2015-August/073559.html 

Ville Syrjälä (17):
  drm/i915: Clean up various HPD defines
  drm/i915: Extract intel_hpd_enabled_irqs()
  drm/i915: Factor out ilk_update_display_irq()
  drm/i915: Add HAS_PCH_LPT_LP() macro
  drm/i915: Rename BXT PORTA HPD defines
  drm/i915: Move {pin,long}_mask initialization to caller from
    intel_get_hpd_pins()
  drm/i915: Introduce spt_irq_handler()
  drm/i915: Add port A HPD support for ILK/SNB
  drm/i915: Add port A HPD support for IVB/HSW
  drm/i915: LPT:LP needs port A HPD enabled in both north and south
  drm/i915: Add port A HPD support for BDW
  drm/i915: Add port A HPD support for SPT
  drm/i915: Reinitialize HPD after runtime D3
  drm/i915: Rewrite bxt_hpd_handler() to look like everyone else
  drm/i915: Refactor the hpd irq handling functions
  drm/i915: Rewrite BXT HPD code to conform to pre-existing style
  drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x

 drivers/gpu/drm/i915/i915_drv.c      |   9 +
 drivers/gpu/drm/i915/i915_drv.h      |   1 +
 drivers/gpu/drm/i915/i915_irq.c      | 477 ++++++++++++++++++++++++-----------
 drivers/gpu/drm/i915/i915_reg.h      |  99 ++++----
 drivers/gpu/drm/i915/intel_display.c |  13 +-
 drivers/gpu/drm/i915/intel_pm.c      |   4 +-
 6 files changed, 390 insertions(+), 213 deletions(-)

-- 
2.4.6

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[PATCH v2 01/17] drm/i915: Clean up various HPD defines

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Indent the PORTx_HOTPLUG_... defines appropriately, and fix some space
vs. tab issues.

v2: Document pre-HSW/LPT bits, and order another tab (Paulo)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 74 +++++++++++++++++++++--------------------
 1 file changed, 38 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ae7fa3e..1864437 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5384,15 +5384,17 @@ enum skl_disp_power_wells {
 
 #define CPU_VGACNTRL	0x41000
 
-#define DIGITAL_PORT_HOTPLUG_CNTRL      0x44030
-#define  DIGITAL_PORTA_HOTPLUG_ENABLE           (1 << 4)
-#define  DIGITAL_PORTA_SHORT_PULSE_2MS          (0 << 2)
-#define  DIGITAL_PORTA_SHORT_PULSE_4_5MS        (1 << 2)
-#define  DIGITAL_PORTA_SHORT_PULSE_6MS          (2 << 2)
-#define  DIGITAL_PORTA_SHORT_PULSE_100MS        (3 << 2)
-#define  DIGITAL_PORTA_NO_DETECT                (0 << 0)
-#define  DIGITAL_PORTA_LONG_PULSE_DETECT_MASK   (1 << 1)
-#define  DIGITAL_PORTA_SHORT_PULSE_DETECT_MASK  (1 << 0)
+#define DIGITAL_PORT_HOTPLUG_CNTRL	0x44030
+#define  DIGITAL_PORTA_HOTPLUG_ENABLE		(1 << 4)
+#define  DIGITAL_PORTA_PULSE_DURATION_2ms	(0 << 2) /* pre-HSW */
+#define  DIGITAL_PORTA_PULSE_DURATION_4_5ms	(1 << 2) /* pre-HSW */
+#define  DIGITAL_PORTA_PULSE_DURATION_6ms	(2 << 2) /* pre-HSW */
+#define  DIGITAL_PORTA_PULSE_DURATION_100ms	(3 << 2) /* pre-HSW */
+#define  DIGITAL_PORTA_PULSE_DURATION_MASK	(3 << 2) /* pre-HSW */
+#define  DIGITAL_PORTA_HOTPLUG_STATUS_MASK	(3 << 0)
+#define  DIGITAL_PORTA_HOTPLUG_NO_DETECT	(0 << 0)
+#define  DIGITAL_PORTA_HOTPLUG_SHORT_DETECT	(1 << 0)
+#define  DIGITAL_PORTA_HOTPLUG_LONG_DETECT	(2 << 0)
 
 /* refresh rate hardware control */
 #define RR_HW_CTL       0x45300
@@ -6020,46 +6022,46 @@ enum skl_disp_power_wells {
 #define  SERR_INT_TRANS_FIFO_UNDERRUN(pipe)	(1<<(pipe*3))
 
 /* digital port hotplug */
-#define PCH_PORT_HOTPLUG        0xc4030		/* SHOTPLUG_CTL */
-#define BXT_PORTA_HOTPLUG_ENABLE	(1 << 28)
-#define BXT_PORTA_HOTPLUG_STATUS_MASK	(0x3 << 24)
+#define PCH_PORT_HOTPLUG		0xc4030	/* SHOTPLUG_CTL */
+#define  BXT_PORTA_HOTPLUG_ENABLE	(1 << 28)
+#define  BXT_PORTA_HOTPLUG_STATUS_MASK	(3 << 24)
 #define  BXT_PORTA_HOTPLUG_NO_DETECT	(0 << 24)
 #define  BXT_PORTA_HOTPLUG_SHORT_DETECT	(1 << 24)
 #define  BXT_PORTA_HOTPLUG_LONG_DETECT	(2 << 24)
-#define PORTD_HOTPLUG_ENABLE            (1 << 20)
-#define PORTD_PULSE_DURATION_2ms        (0)
-#define PORTD_PULSE_DURATION_4_5ms      (1 << 18)
-#define PORTD_PULSE_DURATION_6ms        (2 << 18)
-#define PORTD_PULSE_DURATION_100ms      (3 << 18)
-#define PORTD_PULSE_DURATION_MASK	(3 << 18)
-#define PORTD_HOTPLUG_STATUS_MASK	(0x3 << 16)
+#define  PORTD_HOTPLUG_ENABLE		(1 << 20)
+#define  PORTD_PULSE_DURATION_2ms	(0 << 18) /* pre-LPT */
+#define  PORTD_PULSE_DURATION_4_5ms	(1 << 18) /* pre-LPT */
+#define  PORTD_PULSE_DURATION_6ms	(2 << 18) /* pre-LPT */
+#define  PORTD_PULSE_DURATION_100ms	(3 << 18) /* pre-LPT */
+#define  PORTD_PULSE_DURATION_MASK	(3 << 18) /* pre-LPT */
+#define  PORTD_HOTPLUG_STATUS_MASK	(3 << 16)
 #define  PORTD_HOTPLUG_NO_DETECT	(0 << 16)
 #define  PORTD_HOTPLUG_SHORT_DETECT	(1 << 16)
 #define  PORTD_HOTPLUG_LONG_DETECT	(2 << 16)
-#define PORTC_HOTPLUG_ENABLE            (1 << 12)
-#define PORTC_PULSE_DURATION_2ms        (0)
-#define PORTC_PULSE_DURATION_4_5ms      (1 << 10)
-#define PORTC_PULSE_DURATION_6ms        (2 << 10)
-#define PORTC_PULSE_DURATION_100ms      (3 << 10)
-#define PORTC_PULSE_DURATION_MASK	(3 << 10)
-#define PORTC_HOTPLUG_STATUS_MASK	(0x3 << 8)
+#define  PORTC_HOTPLUG_ENABLE		(1 << 12)
+#define  PORTC_PULSE_DURATION_2ms	(0 << 10) /* pre-LPT */
+#define  PORTC_PULSE_DURATION_4_5ms	(1 << 10) /* pre-LPT */
+#define  PORTC_PULSE_DURATION_6ms	(2 << 10) /* pre-LPT */
+#define  PORTC_PULSE_DURATION_100ms	(3 << 10) /* pre-LPT */
+#define  PORTC_PULSE_DURATION_MASK	(3 << 10) /* pre-LPT */
+#define  PORTC_HOTPLUG_STATUS_MASK	(3 << 8)
 #define  PORTC_HOTPLUG_NO_DETECT	(0 << 8)
 #define  PORTC_HOTPLUG_SHORT_DETECT	(1 << 8)
 #define  PORTC_HOTPLUG_LONG_DETECT	(2 << 8)
-#define PORTB_HOTPLUG_ENABLE            (1 << 4)
-#define PORTB_PULSE_DURATION_2ms        (0)
-#define PORTB_PULSE_DURATION_4_5ms      (1 << 2)
-#define PORTB_PULSE_DURATION_6ms        (2 << 2)
-#define PORTB_PULSE_DURATION_100ms      (3 << 2)
-#define PORTB_PULSE_DURATION_MASK	(3 << 2)
-#define PORTB_HOTPLUG_STATUS_MASK	(0x3 << 0)
+#define  PORTB_HOTPLUG_ENABLE		(1 << 4)
+#define  PORTB_PULSE_DURATION_2ms	(0 << 2) /* pre-LPT */
+#define  PORTB_PULSE_DURATION_4_5ms	(1 << 2) /* pre-LPT */
+#define  PORTB_PULSE_DURATION_6ms	(2 << 2) /* pre-LPT */
+#define  PORTB_PULSE_DURATION_100ms	(3 << 2) /* pre-LPT */
+#define  PORTB_PULSE_DURATION_MASK	(3 << 2) /* pre-LPT */
+#define  PORTB_HOTPLUG_STATUS_MASK	(3 << 0)
 #define  PORTB_HOTPLUG_NO_DETECT	(0 << 0)
 #define  PORTB_HOTPLUG_SHORT_DETECT	(1 << 0)
 #define  PORTB_HOTPLUG_LONG_DETECT	(2 << 0)
 
-#define PCH_PORT_HOTPLUG2        0xc403C		/* SHOTPLUG_CTL2 */
-#define PORTE_HOTPLUG_ENABLE            (1 << 4)
-#define PORTE_HOTPLUG_STATUS_MASK	(0x3 << 0)
+#define PCH_PORT_HOTPLUG2		0xc403C	/* SHOTPLUG_CTL2 SPT+ */
+#define  PORTE_HOTPLUG_ENABLE		(1 << 4)
+#define  PORTE_HOTPLUG_STATUS_MASK	(3 << 0)
 #define  PORTE_HOTPLUG_NO_DETECT	(0 << 0)
 #define  PORTE_HOTPLUG_SHORT_DETECT	(1 << 0)
 #define  PORTE_HOTPLUG_LONG_DETECT	(2 << 0)
-- 
2.4.6

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[PATCH v2 02/17] drm/i915: Extract intel_hpd_enabled_irqs()

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Eliminate a bunch of duplicated code that calculates the currently
enabled HPD interrupt bits.

v2: s/;/:/ in patch subject (Paulo)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 43 ++++++++++++++++++++---------------------
 1 file changed, 21 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8485bea..de0edbd 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3002,27 +3002,34 @@ static void cherryview_irq_preinstall(struct drm_device *dev)
 	vlv_display_irq_reset(dev_priv);
 }
 
+static u32 intel_hpd_enabled_irqs(struct drm_device *dev,
+				  const u32 hpd[HPD_NUM_PINS])
+{
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct intel_encoder *encoder;
+	u32 enabled_irqs = 0;
+
+	for_each_intel_encoder(dev, encoder)
+		if (dev_priv->hotplug.stats[encoder->hpd_pin].state == HPD_ENABLED)
+			enabled_irqs |= hpd[encoder->hpd_pin];
+
+	return enabled_irqs;
+}
+
 static void ibx_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_encoder *intel_encoder;
-	u32 hotplug_irqs, hotplug, enabled_irqs = 0;
+	u32 hotplug_irqs, hotplug, enabled_irqs;
 
 	if (HAS_PCH_IBX(dev)) {
 		hotplug_irqs = SDE_HOTPLUG_MASK;
-		for_each_intel_encoder(dev, intel_encoder)
-			if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state == HPD_ENABLED)
-				enabled_irqs |= hpd_ibx[intel_encoder->hpd_pin];
+		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ibx);
 	} else if (HAS_PCH_SPT(dev)) {
 		hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
-		for_each_intel_encoder(dev, intel_encoder)
-			if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state == HPD_ENABLED)
-				enabled_irqs |= hpd_spt[intel_encoder->hpd_pin];
+		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_spt);
 	} else {
 		hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
-		for_each_intel_encoder(dev, intel_encoder)
-			if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state == HPD_ENABLED)
-				enabled_irqs |= hpd_cpt[intel_encoder->hpd_pin];
+		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_cpt);
 	}
 
 	ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
@@ -3051,15 +3058,10 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
 static void bxt_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_encoder *intel_encoder;
-	u32 hotplug_port = 0;
+	u32 hotplug_port;
 	u32 hotplug_ctrl;
 
-	for_each_intel_encoder(dev, intel_encoder) {
-		if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state
-				== HPD_ENABLED)
-			hotplug_port |= hpd_bxt[intel_encoder->hpd_pin];
-	}
+	hotplug_port = intel_hpd_enabled_irqs(dev, hpd_bxt);
 
 	hotplug_ctrl = I915_READ(BXT_HOTPLUG_CTL) & ~BXT_HOTPLUG_CTL_MASK;
 
@@ -3935,7 +3937,6 @@ static int i965_irq_postinstall(struct drm_device *dev)
 static void i915_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_encoder *intel_encoder;
 	u32 hotplug_en;
 
 	assert_spin_locked(&dev_priv->irq_lock);
@@ -3944,9 +3945,7 @@ static void i915_hpd_irq_setup(struct drm_device *dev)
 	hotplug_en &= ~HOTPLUG_INT_EN_MASK;
 	/* Note HDMI and DP share hotplug bits */
 	/* enable bits are the same for all generations */
-	for_each_intel_encoder(dev, intel_encoder)
-		if (dev_priv->hotplug.stats[intel_encoder->hpd_pin].state == HPD_ENABLED)
-			hotplug_en |= hpd_mask_i915[intel_encoder->hpd_pin];
+	hotplug_en |= intel_hpd_enabled_irqs(dev, hpd_mask_i915);
 	/* Programming the CRT detection parameters tends
 	   to generate a spurious hotplug event about three
 	   seconds later.  So just do it once.
-- 
2.4.6

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[PATCH v2 03/17] drm/i915: Factor out ilk_update_display_irq()

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the core of ironlake_{enable,disable}_display_irq() into a new
function. We'll have further use for it later.

v2: Warn about invalid mask vs. enable bits (Paulo)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 41 ++++++++++++++++++++++++++---------------
 1 file changed, 26 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index de0edbd..baff963 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -154,35 +154,46 @@ static const u32 hpd_bxt[HPD_NUM_PINS] = {
 
 static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir);
 
-/* For display hotplug interrupt */
-void
-ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
+/**
+ * ilk_update_display_irq - update DEIMR
+ * @dev_priv: driver private
+ * @interrupt_mask: mask of interrupt bits to update
+ * @enabled_irq_mask: mask of interrupt bits to enable
+ */
+static void ilk_update_display_irq(struct drm_i915_private *dev_priv,
+				   uint32_t interrupt_mask,
+				   uint32_t enabled_irq_mask)
 {
+	uint32_t new_val;
+
 	assert_spin_locked(&dev_priv->irq_lock);
 
+	WARN_ON(enabled_irq_mask & ~interrupt_mask);
+
 	if (WARN_ON(!intel_irqs_enabled(dev_priv)))
 		return;
 
-	if ((dev_priv->irq_mask & mask) != 0) {
-		dev_priv->irq_mask &= ~mask;
+	new_val = dev_priv->irq_mask;
+	new_val &= ~interrupt_mask;
+	new_val |= (~enabled_irq_mask & interrupt_mask);
+
+	if (new_val != dev_priv->irq_mask) {
+		dev_priv->irq_mask = new_val;
 		I915_WRITE(DEIMR, dev_priv->irq_mask);
 		POSTING_READ(DEIMR);
 	}
 }
 
 void
-ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
+ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
 {
-	assert_spin_locked(&dev_priv->irq_lock);
-
-	if (WARN_ON(!intel_irqs_enabled(dev_priv)))
-		return;
+	ilk_update_display_irq(dev_priv, mask, mask);
+}
 
-	if ((dev_priv->irq_mask & mask) != mask) {
-		dev_priv->irq_mask |= mask;
-		I915_WRITE(DEIMR, dev_priv->irq_mask);
-		POSTING_READ(DEIMR);
-	}
+void
+ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
+{
+	ilk_update_display_irq(dev_priv, mask, 0);
 }
 
 /**
-- 
2.4.6

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[PATCH 04/17] drm/i915: Add HAS_PCH_LPT_LP() macro

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make LPT:LP checks look neater by wrapping the details in a
new HAS_PCH_LPT_LP() macro.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/intel_display.c | 13 +++++--------
 drivers/gpu/drm/i915/intel_pm.c      |  4 ++--
 3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8c93845..3ed3111 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2588,6 +2588,7 @@ struct drm_i915_cmd_table {
 #define INTEL_PCH_TYPE(dev) (__I915__(dev)->pch_type)
 #define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT)
 #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
+#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
 #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
 #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
 #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 779c5da..e53c9af 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8320,8 +8320,7 @@ static void lpt_enable_clkout_dp(struct drm_device *dev, bool with_spread,
 
 	if (WARN(with_fdi && !with_spread, "FDI requires downspread\n"))
 		with_spread = true;
-	if (WARN(dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE &&
-		 with_fdi, "LP PCH doesn't have FDI\n"))
+	if (WARN(HAS_PCH_LPT_LP(dev) && with_fdi, "LP PCH doesn't have FDI\n"))
 		with_fdi = false;
 
 	mutex_lock(&dev_priv->sb_lock);
@@ -8344,8 +8343,7 @@ static void lpt_enable_clkout_dp(struct drm_device *dev, bool with_spread,
 		}
 	}
 
-	reg = (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) ?
-	       SBI_GEN0 : SBI_DBUFF0;
+	reg = HAS_PCH_LPT_LP(dev) ? SBI_GEN0 : SBI_DBUFF0;
 	tmp = intel_sbi_read(dev_priv, reg, SBI_ICLK);
 	tmp |= SBI_GEN0_CFG_BUFFENABLE_DISABLE;
 	intel_sbi_write(dev_priv, reg, tmp, SBI_ICLK);
@@ -8361,8 +8359,7 @@ static void lpt_disable_clkout_dp(struct drm_device *dev)
 
 	mutex_lock(&dev_priv->sb_lock);
 
-	reg = (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) ?
-	       SBI_GEN0 : SBI_DBUFF0;
+	reg = HAS_PCH_LPT_LP(dev) ? SBI_GEN0 : SBI_DBUFF0;
 	tmp = intel_sbi_read(dev_priv, reg, SBI_ICLK);
 	tmp &= ~SBI_GEN0_CFG_BUFFENABLE_DISABLE;
 	intel_sbi_write(dev_priv, reg, tmp, SBI_ICLK);
@@ -9374,7 +9371,7 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv)
 
 	DRM_DEBUG_KMS("Enabling package C8+\n");
 
-	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
+	if (HAS_PCH_LPT_LP(dev)) {
 		val = I915_READ(SOUTH_DSPCLK_GATE_D);
 		val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
 		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
@@ -9394,7 +9391,7 @@ void hsw_disable_pc8(struct drm_i915_private *dev_priv)
 	hsw_restore_lcpll(dev_priv);
 	lpt_init_pch_refclk(dev);
 
-	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
+	if (HAS_PCH_LPT_LP(dev)) {
 		val = I915_READ(SOUTH_DSPCLK_GATE_D);
 		val |= PCH_LP_PARTITION_LEVEL_DISABLE;
 		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fff0c226..ea49661 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6588,7 +6588,7 @@ static void lpt_init_clock_gating(struct drm_device *dev)
 	 * TODO: this bit should only be enabled when really needed, then
 	 * disabled when not needed anymore in order to save power.
 	 */
-	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
+	if (HAS_PCH_LPT_LP(dev))
 		I915_WRITE(SOUTH_DSPCLK_GATE_D,
 			   I915_READ(SOUTH_DSPCLK_GATE_D) |
 			   PCH_LP_PARTITION_LEVEL_DISABLE);
@@ -6603,7 +6603,7 @@ static void lpt_suspend_hw(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
+	if (HAS_PCH_LPT_LP(dev)) {
 		uint32_t val = I915_READ(SOUTH_DSPCLK_GATE_D);
 
 		val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
-- 
2.4.6

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[PATCH 05/17] drm/i915: Rename BXT PORTA HPD defines

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The PORTA HPD defines are not BXT specific. They also exist on SPT,
and partially already on LPT:LP.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c |  2 +-
 drivers/gpu/drm/i915/i915_reg.h | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index baff963..3388b64 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1250,7 +1250,7 @@ static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
 {
 	switch (port) {
 	case PORT_A:
-		return val & BXT_PORTA_HOTPLUG_LONG_DETECT;
+		return val & PORTA_HOTPLUG_LONG_DETECT;
 	case PORT_B:
 		return val & PORTB_HOTPLUG_LONG_DETECT;
 	case PORT_C:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1864437..59f0ba1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6023,11 +6023,11 @@ enum skl_disp_power_wells {
 
 /* digital port hotplug */
 #define PCH_PORT_HOTPLUG		0xc4030	/* SHOTPLUG_CTL */
-#define  BXT_PORTA_HOTPLUG_ENABLE	(1 << 28)
-#define  BXT_PORTA_HOTPLUG_STATUS_MASK	(3 << 24)
-#define  BXT_PORTA_HOTPLUG_NO_DETECT	(0 << 24)
-#define  BXT_PORTA_HOTPLUG_SHORT_DETECT	(1 << 24)
-#define  BXT_PORTA_HOTPLUG_LONG_DETECT	(2 << 24)
+#define  PORTA_HOTPLUG_ENABLE		(1 << 28) /* LPT:LP+ & BXT */
+#define  PORTA_HOTPLUG_STATUS_MASK	(3 << 24) /* SPT+ & BXT */
+#define  PORTA_HOTPLUG_NO_DETECT	(0 << 24) /* SPT+ & BXT */
+#define  PORTA_HOTPLUG_SHORT_DETECT	(1 << 24) /* SPT+ & BXT */
+#define  PORTA_HOTPLUG_LONG_DETECT	(2 << 24) /* SPT+ & BXT */
 #define  PORTD_HOTPLUG_ENABLE		(1 << 20)
 #define  PORTD_PULSE_DURATION_2ms	(0 << 18) /* pre-LPT */
 #define  PORTD_PULSE_DURATION_4_5ms	(1 << 18) /* pre-LPT */
-- 
2.4.6

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[PATCH 06/17] drm/i915: Move {pin, long}_mask initialization to caller from intel_get_hpd_pins()

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the 0 initialization of pin_mask and long_mask from
intel_get_hpd_pins() into each caller. This we we can call
intel_get_hpd_pins() multiple times to accumulate more pins from several
sources.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3388b64..db27945 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1301,9 +1301,6 @@ static void intel_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
 	enum port port;
 	int i;
 
-	*pin_mask = 0;
-	*long_mask = 0;
-
 	for_each_hpd_pin(i) {
 		if ((hpd[i] & hotplug_trigger) == 0)
 			continue;
@@ -1544,7 +1541,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
-	u32 pin_mask, long_mask;
+	u32 pin_mask = 0, long_mask = 0;
 
 	if (!hotplug_status)
 		return;
@@ -1673,7 +1670,7 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
 
 	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask, long_mask;
+		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
 
 		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
 		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
@@ -1781,7 +1778,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
 		hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
 
 	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask, long_mask;
+		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
 
 		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
 		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
@@ -2004,7 +2001,7 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 hp_control, hp_trigger;
-	u32 pin_mask, long_mask;
+	u32 pin_mask = 0, long_mask = 0;
 
 	/* Get the status */
 	hp_trigger = iir_status & BXT_DE_PORT_HOTPLUG_MASK;
-- 
2.4.6

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[PATCH v2 07/17] drm/i915: Introduce spt_irq_handler()

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Starting from SPT the only interrupts living in the south are GMBUS and
HPD. What's worse some of the SPT specific new bits conflict with some
other bits on earlier PCH generations. So better not use the
cpt_irq_handler() for SPT+ anymore.

Also kill the hand rolled port E handling with something more
standardish. This also avoids accidentally confusing port B and port E
long pulses since the bits occupy the same positions, just in different
registers.

Also add a comment noting that the short pulse duration bits are
reserved on LPT+. The 2ms value we program is 0, so no issue wrt. the
MBZ in the spec.

v2: Call intel_hpd_irq_handler() only once (Paulo)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 124 +++++++++++++++++++++++++++-------------
 1 file changed, 84 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index db27945..978a528 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1262,6 +1262,16 @@ static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
 	}
 }
 
+static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
+{
+	switch (port) {
+	case PORT_E:
+		return val & PORTE_HOTPLUG_LONG_DETECT;
+	default:
+		return false;
+	}
+}
+
 static bool pch_port_hotplug_long_detect(enum port port, u32 val)
 {
 	switch (port) {
@@ -1271,8 +1281,6 @@ static bool pch_port_hotplug_long_detect(enum port port, u32 val)
 		return val & PORTC_HOTPLUG_LONG_DETECT;
 	case PORT_D:
 		return val & PORTD_HOTPLUG_LONG_DETECT;
-	case PORT_E:
-		return val & PORTE_HOTPLUG_LONG_DETECT;
 	default:
 		return false;
 	}
@@ -1770,12 +1778,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int pipe;
-	u32 hotplug_trigger;
-
-	if (HAS_PCH_SPT(dev))
-		hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT;
-	else
-		hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
+	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
 
 	if (hotplug_trigger) {
 		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
@@ -1783,22 +1786,10 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
 		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
 		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
 
-		if (HAS_PCH_SPT(dev)) {
-			intel_get_hpd_pins(&pin_mask, &long_mask,
-					   hotplug_trigger,
-					   dig_hotplug_reg, hpd_spt,
-					   pch_port_hotplug_long_detect);
-
-			/* detect PORTE HP event */
-			dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
-			if (pch_port_hotplug_long_detect(PORT_E,
-							 dig_hotplug_reg))
-				long_mask |= 1 << HPD_PORT_E;
-		} else
-			intel_get_hpd_pins(&pin_mask, &long_mask,
-					   hotplug_trigger,
-					   dig_hotplug_reg, hpd_cpt,
-					   pch_port_hotplug_long_detect);
+		intel_get_hpd_pins(&pin_mask, &long_mask,
+				   hotplug_trigger,
+				   dig_hotplug_reg, hpd_cpt,
+				   pch_port_hotplug_long_detect);
 
 		intel_hpd_irq_handler(dev, pin_mask, long_mask);
 	}
@@ -1832,6 +1823,43 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
 		cpt_serr_int_handler(dev);
 }
 
+static void spt_irq_handler(struct drm_device *dev, u32 pch_iir)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
+		~SDE_PORTE_HOTPLUG_SPT;
+	u32 hotplug2_trigger = pch_iir & SDE_PORTE_HOTPLUG_SPT;
+	u32 pin_mask = 0, long_mask = 0;
+
+	if (hotplug_trigger) {
+		u32 dig_hotplug_reg;
+
+		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
+		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
+
+		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+				   dig_hotplug_reg, hpd_spt,
+				   pch_port_hotplug_long_detect);
+	}
+
+	if (hotplug2_trigger) {
+		u32 dig_hotplug_reg;
+
+		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
+		I915_WRITE(PCH_PORT_HOTPLUG2, dig_hotplug_reg);
+
+		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug2_trigger,
+				   dig_hotplug_reg, hpd_spt,
+				   spt_port_hotplug2_long_detect);
+	}
+
+	if (pin_mask)
+		intel_hpd_irq_handler(dev, pin_mask, long_mask);
+
+	if (pch_iir & SDE_GMBUS_CPT)
+		gmbus_irq_handler(dev);
+}
+
 static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2150,7 +2178,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 		if (pch_iir) {
 			I915_WRITE(SDEIIR, pch_iir);
 			ret = IRQ_HANDLED;
-			cpt_irq_handler(dev, pch_iir);
+
+			if (HAS_PCH_SPT(dev_priv))
+				spt_irq_handler(dev, pch_iir);
+			else
+				cpt_irq_handler(dev, pch_iir);
 		} else
 			DRM_ERROR("The master control interrupt lied (SDE)!\n");
 
@@ -3032,9 +3064,6 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
 	if (HAS_PCH_IBX(dev)) {
 		hotplug_irqs = SDE_HOTPLUG_MASK;
 		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ibx);
-	} else if (HAS_PCH_SPT(dev)) {
-		hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
-		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_spt);
 	} else {
 		hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
 		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_cpt);
@@ -3044,9 +3073,8 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
 
 	/*
 	 * Enable digital hotplug on the PCH, and configure the DP short pulse
-	 * duration to 2ms (which is the minimum in the Display Port spec)
-	 *
-	 * This register is the same on all known PCH chips.
+	 * duration to 2ms (which is the minimum in the Display Port spec).
+	 * The pulse duration bits are reserved on LPT+.
 	 */
 	hotplug = I915_READ(PCH_PORT_HOTPLUG);
 	hotplug &= ~(PORTD_PULSE_DURATION_MASK|PORTC_PULSE_DURATION_MASK|PORTB_PULSE_DURATION_MASK);
@@ -3054,13 +3082,27 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
 	hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms;
 	hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms;
 	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
+}
 
-	/* enable SPT PORTE hot plug */
-	if (HAS_PCH_SPT(dev)) {
-		hotplug = I915_READ(PCH_PORT_HOTPLUG2);
-		hotplug |= PORTE_HOTPLUG_ENABLE;
-		I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);
-	}
+static void spt_hpd_irq_setup(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 hotplug_irqs, hotplug, enabled_irqs;
+
+	hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
+	enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_spt);
+
+	ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
+
+	/* Enable digital hotplug on the PCH */
+	hotplug = I915_READ(PCH_PORT_HOTPLUG);
+	hotplug |= PORTD_HOTPLUG_ENABLE | PORTC_HOTPLUG_ENABLE |
+		PORTB_HOTPLUG_ENABLE;
+	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
+
+	hotplug = I915_READ(PCH_PORT_HOTPLUG2);
+	hotplug |= PORTE_HOTPLUG_ENABLE;
+	I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);
 }
 
 static void bxt_hpd_irq_setup(struct drm_device *dev)
@@ -4165,10 +4207,12 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
 		dev->driver->irq_uninstall = gen8_irq_uninstall;
 		dev->driver->enable_vblank = gen8_enable_vblank;
 		dev->driver->disable_vblank = gen8_disable_vblank;
-		if (HAS_PCH_SPLIT(dev))
-			dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
-		else
+		if (IS_BROXTON(dev))
 			dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
+		else if (HAS_PCH_SPT(dev))
+			dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
+		else
+			dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
 	} else if (HAS_PCH_SPLIT(dev)) {
 		dev->driver->irq_handler = ironlake_irq_handler;
 		dev->driver->irq_preinstall = ironlake_irq_reset;
-- 
2.4.6

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[PATCH v2 08/17] drm/i915: Add port A HPD support for ILK/SNB

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

ILK/SNB support port A HPD. While HPD is optional on eDP let's at least
try to wite it up so that we might notice if the link has issues.

The eDP spec suggests that if HPD is not wired up, one should poll the
link status instead. We don't even do that currently.

v2: 0 initialize pin_mask/long_mask due to intel_get_hpd_pins() changes

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 59 ++++++++++++++++++++++++++++++++++++++---
 1 file changed, 56 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 978a528..45ab75c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -45,6 +45,10 @@
  * and related files, but that will be described in separate chapters.
  */
 
+static const u32 hpd_ilk[HPD_NUM_PINS] = {
+	[HPD_PORT_A] = DE_DP_A_HOTPLUG,
+};
+
 static const u32 hpd_ibx[HPD_NUM_PINS] = {
 	[HPD_CRT] = SDE_CRT_HOTPLUG,
 	[HPD_SDVO_B] = SDE_SDVOB_HOTPLUG,
@@ -1272,6 +1276,16 @@ static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
 	}
 }
 
+static bool ilk_port_hotplug_long_detect(enum port port, u32 val)
+{
+	switch (port) {
+	case PORT_A:
+		return val & DIGITAL_PORTA_HOTPLUG_LONG_DETECT;
+	default:
+		return false;
+	}
+}
+
 static bool pch_port_hotplug_long_detect(enum port port, u32 val)
 {
 	switch (port) {
@@ -1864,6 +1878,19 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	enum pipe pipe;
+	u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
+
+	if (hotplug_trigger) {
+		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
+
+		dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
+		I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
+
+		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+				   dig_hotplug_reg, hpd_ilk,
+				   ilk_port_hotplug_long_detect);
+		intel_hpd_irq_handler(dev, pin_mask, long_mask);
+	}
 
 	if (de_iir & DE_AUX_CHANNEL_A)
 		dp_aux_irq_handler(dev);
@@ -3105,6 +3132,28 @@ static void spt_hpd_irq_setup(struct drm_device *dev)
 	I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);
 }
 
+static void ilk_hpd_irq_setup(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 hotplug_irqs, hotplug, enabled_irqs;
+
+	hotplug_irqs = DE_DP_A_HOTPLUG;
+	enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ilk);
+
+	ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
+
+	/*
+	 * Enable digital hotplug on the CPU, and configure the DP short pulse
+	 * duration to 2ms (which is the minimum in the Display Port spec)
+	 */
+	hotplug = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
+	hotplug &= ~DIGITAL_PORTA_PULSE_DURATION_MASK;
+	hotplug |= DIGITAL_PORTA_HOTPLUG_ENABLE | DIGITAL_PORTA_PULSE_DURATION_2ms;
+	I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, hotplug);
+
+	ibx_hpd_irq_setup(dev);
+}
+
 static void bxt_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -3203,8 +3252,9 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
 				DE_AUX_CHANNEL_A |
 				DE_PIPEB_CRC_DONE | DE_PIPEA_CRC_DONE |
 				DE_POISON);
-		extra_mask = DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT |
-				DE_PIPEB_FIFO_UNDERRUN | DE_PIPEA_FIFO_UNDERRUN;
+		extra_mask = (DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT |
+			      DE_PIPEB_FIFO_UNDERRUN | DE_PIPEA_FIFO_UNDERRUN |
+			      DE_DP_A_HOTPLUG);
 	}
 
 	dev_priv->irq_mask = ~display_mask;
@@ -4220,7 +4270,10 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
 		dev->driver->irq_uninstall = ironlake_irq_uninstall;
 		dev->driver->enable_vblank = ironlake_enable_vblank;
 		dev->driver->disable_vblank = ironlake_disable_vblank;
-		dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
+		if (INTEL_INFO(dev)->gen >= 7)
+			dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
+		else
+			dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
 	} else {
 		if (INTEL_INFO(dev_priv)->gen == 2) {
 			dev->driver->irq_preinstall = i8xx_irq_preinstall;
-- 
2.4.6

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[PATCH v2 09/17] drm/i915: Add port A HPD support for IVB/HSW

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

As with ILK/SNB wire up the port A HPD on IVB/HSW.

This might be more important on HSW with PSR. BSpec tells us that if the
automagic link training performed by the hardware fails for some reason,
we're going to get a short HPD and are supposed to re-train the link
manyally.

v2: 0 initialize pin_mask/long_mask due to intel_get_hpd_pins() changes
    Add a comment about the pulse duration bits being reserved on HSW+
    like we have for LPT+ in ibx_hpd_irq_setup()

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 35 ++++++++++++++++++++++++++++-------
 1 file changed, 28 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 45ab75c..a34521c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -49,6 +49,10 @@ static const u32 hpd_ilk[HPD_NUM_PINS] = {
 	[HPD_PORT_A] = DE_DP_A_HOTPLUG,
 };
 
+static const u32 hpd_ivb[HPD_NUM_PINS] = {
+	[HPD_PORT_A] = DE_DP_A_HOTPLUG_IVB,
+};
+
 static const u32 hpd_ibx[HPD_NUM_PINS] = {
 	[HPD_CRT] = SDE_CRT_HOTPLUG,
 	[HPD_SDVO_B] = SDE_SDVOB_HOTPLUG,
@@ -1940,6 +1944,19 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	enum pipe pipe;
+	u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
+
+	if (hotplug_trigger) {
+		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
+
+		dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
+		I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
+
+		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+				   dig_hotplug_reg, hpd_ivb,
+				   ilk_port_hotplug_long_detect);
+		intel_hpd_irq_handler(dev, pin_mask, long_mask);
+	}
 
 	if (de_iir & DE_ERR_INT_IVB)
 		ivb_err_int_handler(dev);
@@ -3137,14 +3154,20 @@ static void ilk_hpd_irq_setup(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 hotplug_irqs, hotplug, enabled_irqs;
 
-	hotplug_irqs = DE_DP_A_HOTPLUG;
-	enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ilk);
+	if (INTEL_INFO(dev)->gen >= 7) {
+		hotplug_irqs = DE_DP_A_HOTPLUG_IVB;
+		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ivb);
+	} else {
+		hotplug_irqs = DE_DP_A_HOTPLUG;
+		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ilk);
+	}
 
 	ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
 
 	/*
 	 * Enable digital hotplug on the CPU, and configure the DP short pulse
 	 * duration to 2ms (which is the minimum in the Display Port spec)
+	 * The pulse duration bits are reserved on HSW+.
 	 */
 	hotplug = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
 	hotplug &= ~DIGITAL_PORTA_PULSE_DURATION_MASK;
@@ -3245,7 +3268,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
 				DE_PLANEB_FLIP_DONE_IVB |
 				DE_PLANEA_FLIP_DONE_IVB | DE_AUX_CHANNEL_A_IVB);
 		extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
-			      DE_PIPEA_VBLANK_IVB | DE_ERR_INT_IVB);
+			      DE_PIPEA_VBLANK_IVB | DE_ERR_INT_IVB |
+			      DE_DP_A_HOTPLUG_IVB);
 	} else {
 		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
 				DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
@@ -4270,10 +4294,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
 		dev->driver->irq_uninstall = ironlake_irq_uninstall;
 		dev->driver->enable_vblank = ironlake_enable_vblank;
 		dev->driver->disable_vblank = ironlake_disable_vblank;
-		if (INTEL_INFO(dev)->gen >= 7)
-			dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
-		else
-			dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
+		dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
 	} else {
 		if (INTEL_INFO(dev_priv)->gen == 2) {
 			dev->driver->irq_preinstall = i8xx_irq_preinstall;
-- 
2.4.6

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[PATCH v2 10/17] drm/i915: LPT:LP needs port A HPD enabled in both north and south

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

If the CPU and PCH are on the same package we must enabled the port A
HPD also in the south hotplug register. To identify the package type
we simply look at the PCH type: LPT-H means separate package, and
LPT-LP means multi chip package (MCP).

v2: Add comment and pimp commit message

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a34521c..886518d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3125,6 +3125,12 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
 	hotplug |= PORTD_HOTPLUG_ENABLE | PORTD_PULSE_DURATION_2ms;
 	hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms;
 	hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms;
+	/*
+	 * When CPU and PCH are on the same package, port A
+	 * HPD must be enabled in both north and south.
+	 */
+	if (HAS_PCH_LPT_LP(dev))
+		hotplug |= PORTA_HOTPLUG_ENABLE;
 	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
 }
 
-- 
2.4.6

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[PATCH v2 11/17] drm/i915: Add port A HPD support for BDW

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Wire up the port A HPD for BDW. Compared to earlier platforms the
interrupt setup is a bit different, but basically everything else
looks the same.

v2: 0 initialize pin_mask/long_mask due to intel_get_hpd_pins() changes
    Check for BDW before processing the HPD to not break BXT
    Set found=true when processing port A HPD
    Sort out the mess I made of the irq setup in v1
    Warn about bad irq mask vs. enable bits in bdw_update_port_irq()  (Paulo)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 86 +++++++++++++++++++++++++++++++++++------
 1 file changed, 74 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 886518d..4d1533c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -53,6 +53,10 @@ static const u32 hpd_ivb[HPD_NUM_PINS] = {
 	[HPD_PORT_A] = DE_DP_A_HOTPLUG_IVB,
 };
 
+static const u32 hpd_bdw[HPD_NUM_PINS] = {
+	[HPD_PORT_A] = GEN8_PORT_DP_A_HOTPLUG,
+};
+
 static const u32 hpd_ibx[HPD_NUM_PINS] = {
 	[HPD_CRT] = SDE_CRT_HOTPLUG,
 	[HPD_SDVO_B] = SDE_SDVOB_HOTPLUG,
@@ -371,6 +375,38 @@ void gen6_disable_rps_interrupts(struct drm_device *dev)
 }
 
 /**
+  * bdw_update_port_irq - update DE port interrupt
+  * @dev_priv: driver private
+  * @interrupt_mask: mask of interrupt bits to update
+  * @enabled_irq_mask: mask of interrupt bits to enable
+  */
+static void bdw_update_port_irq(struct drm_i915_private *dev_priv,
+				uint32_t interrupt_mask,
+				uint32_t enabled_irq_mask)
+{
+	uint32_t new_val;
+	uint32_t old_val;
+
+	assert_spin_locked(&dev_priv->irq_lock);
+
+	WARN_ON(enabled_irq_mask & ~interrupt_mask);
+
+	if (WARN_ON(!intel_irqs_enabled(dev_priv)))
+		return;
+
+	old_val = I915_READ(GEN8_DE_PORT_IMR);
+
+	new_val = old_val;
+	new_val &= ~interrupt_mask;
+	new_val |= (~enabled_irq_mask & interrupt_mask);
+
+	if (new_val != old_val) {
+		I915_WRITE(GEN8_DE_PORT_IMR, new_val);
+		POSTING_READ(GEN8_DE_PORT_IMR);
+	}
+}
+
+/**
  * ibx_display_interrupt_update - update SDEIMR
  * @dev_priv: driver private
  * @interrupt_mask: mask of interrupt bits to update
@@ -2139,10 +2175,24 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 		tmp = I915_READ(GEN8_DE_PORT_IIR);
 		if (tmp) {
 			bool found = false;
+			u32 hotplug_trigger = tmp & GEN8_PORT_DP_A_HOTPLUG;
 
 			I915_WRITE(GEN8_DE_PORT_IIR, tmp);
 			ret = IRQ_HANDLED;
 
+			if (IS_BROADWELL(dev) && hotplug_trigger) {
+				u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
+
+				dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
+				I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
+
+				intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+						   dig_hotplug_reg, hpd_bdw,
+						   ilk_port_hotplug_long_detect);
+				intel_hpd_irq_handler(dev, pin_mask, long_mask);
+				found = true;
+			}
+
 			if (tmp & aux_mask) {
 				dp_aux_irq_handler(dev);
 				found = true;
@@ -3160,15 +3210,22 @@ static void ilk_hpd_irq_setup(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 hotplug_irqs, hotplug, enabled_irqs;
 
-	if (INTEL_INFO(dev)->gen >= 7) {
+	if (INTEL_INFO(dev)->gen >= 8) {
+		hotplug_irqs = GEN8_PORT_DP_A_HOTPLUG;
+		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_bdw);
+
+		bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
+	} else if (INTEL_INFO(dev)->gen >= 7) {
 		hotplug_irqs = DE_DP_A_HOTPLUG_IVB;
 		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ivb);
+
+		ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
 	} else {
 		hotplug_irqs = DE_DP_A_HOTPLUG;
 		enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ilk);
-	}
 
-	ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
+		ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
+	}
 
 	/*
 	 * Enable digital hotplug on the CPU, and configure the DP short pulse
@@ -3480,24 +3537,29 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 {
 	uint32_t de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE;
 	uint32_t de_pipe_enables;
-	int pipe;
-	u32 de_port_en = GEN8_AUX_CHANNEL_A;
+	u32 de_port_masked = GEN8_AUX_CHANNEL_A;
+	u32 de_port_enables;
+	enum pipe pipe;
 
 	if (IS_GEN9(dev_priv)) {
 		de_pipe_masked |= GEN9_PIPE_PLANE1_FLIP_DONE |
 				  GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
-		de_port_en |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
-			GEN9_AUX_CHANNEL_D;
-
+		de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
+				  GEN9_AUX_CHANNEL_D;
 		if (IS_BROXTON(dev_priv))
-			de_port_en |= BXT_DE_PORT_GMBUS;
-	} else
+			de_port_masked |= BXT_DE_PORT_GMBUS;
+	} else {
 		de_pipe_masked |= GEN8_PIPE_PRIMARY_FLIP_DONE |
 				  GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
+	}
 
 	de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
 					   GEN8_PIPE_FIFO_UNDERRUN;
 
+	de_port_enables = de_port_masked;
+	if (IS_BROADWELL(dev_priv))
+		de_port_enables |= GEN8_PORT_DP_A_HOTPLUG;
+
 	dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
 	dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_masked;
 	dev_priv->de_irq_mask[PIPE_C] = ~de_pipe_masked;
@@ -3509,7 +3571,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 					  dev_priv->de_irq_mask[pipe],
 					  de_pipe_enables);
 
-	GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_en, de_port_en);
+	GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_masked, de_port_enables);
 }
 
 static int gen8_irq_postinstall(struct drm_device *dev)
@@ -4292,7 +4354,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
 		else if (HAS_PCH_SPT(dev))
 			dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
 		else
-			dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
+			dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
 	} else if (HAS_PCH_SPLIT(dev)) {
 		dev->driver->irq_handler = ironlake_irq_handler;
 		dev->driver->irq_preinstall = ironlake_irq_reset;
-- 
2.4.6

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[PATCH 12/17] drm/i915: Add port A HPD support for SPT

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On SKL the port A HPD has moved to the PCH. Hook it up.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 21 +++++++++++++++++++--
 drivers/gpu/drm/i915/i915_reg.h |  4 +++-
 2 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4d1533c..53e51b5 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -74,6 +74,7 @@ static const u32 hpd_cpt[HPD_NUM_PINS] = {
 };
 
 static const u32 hpd_spt[HPD_NUM_PINS] = {
+	[HPD_PORT_A] = SDE_PORTA_HOTPLUG_SPT,
 	[HPD_PORT_B] = SDE_PORTB_HOTPLUG_CPT,
 	[HPD_PORT_C] = SDE_PORTC_HOTPLUG_CPT,
 	[HPD_PORT_D] = SDE_PORTD_HOTPLUG_CPT,
@@ -1316,6 +1317,22 @@ static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
 	}
 }
 
+static bool spt_port_hotplug_long_detect(enum port port, u32 val)
+{
+	switch (port) {
+	case PORT_A:
+		return val & PORTA_HOTPLUG_LONG_DETECT;
+	case PORT_B:
+		return val & PORTB_HOTPLUG_LONG_DETECT;
+	case PORT_C:
+		return val & PORTC_HOTPLUG_LONG_DETECT;
+	case PORT_D:
+		return val & PORTD_HOTPLUG_LONG_DETECT;
+	default:
+		return false;
+	}
+}
+
 static bool ilk_port_hotplug_long_detect(enum port port, u32 val)
 {
 	switch (port) {
@@ -1893,7 +1910,7 @@ static void spt_irq_handler(struct drm_device *dev, u32 pch_iir)
 
 		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
 				   dig_hotplug_reg, hpd_spt,
-				   pch_port_hotplug_long_detect);
+				   spt_port_hotplug_long_detect);
 	}
 
 	if (hotplug2_trigger) {
@@ -3197,7 +3214,7 @@ static void spt_hpd_irq_setup(struct drm_device *dev)
 	/* Enable digital hotplug on the PCH */
 	hotplug = I915_READ(PCH_PORT_HOTPLUG);
 	hotplug |= PORTD_HOTPLUG_ENABLE | PORTC_HOTPLUG_ENABLE |
-		PORTB_HOTPLUG_ENABLE;
+		PORTB_HOTPLUG_ENABLE | PORTA_HOTPLUG_ENABLE;
 	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
 
 	hotplug = I915_READ(PCH_PORT_HOTPLUG2);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 59f0ba1..0fc8888 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5974,6 +5974,7 @@ enum skl_disp_power_wells {
 #define SDE_AUXB_CPT		(1 << 25)
 #define SDE_AUX_MASK_CPT	(7 << 25)
 #define SDE_PORTE_HOTPLUG_SPT	(1 << 25)
+#define SDE_PORTA_HOTPLUG_SPT	(1 << 24)
 #define SDE_PORTD_HOTPLUG_CPT	(1 << 23)
 #define SDE_PORTC_HOTPLUG_CPT	(1 << 22)
 #define SDE_PORTB_HOTPLUG_CPT	(1 << 21)
@@ -5987,7 +5988,8 @@ enum skl_disp_power_wells {
 #define SDE_HOTPLUG_MASK_SPT	(SDE_PORTE_HOTPLUG_SPT |	\
 				 SDE_PORTD_HOTPLUG_CPT |	\
 				 SDE_PORTC_HOTPLUG_CPT |	\
-				 SDE_PORTB_HOTPLUG_CPT)
+				 SDE_PORTB_HOTPLUG_CPT |	\
+				 SDE_PORTA_HOTPLUG_SPT)
 #define SDE_GMBUS_CPT		(1 << 17)
 #define SDE_ERROR_CPT		(1 << 16)
 #define SDE_AUDIO_CP_REQ_C_CPT	(1 << 10)
-- 
2.4.6

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[PATCH 13/17] drm/i915: Reinitialize HPD after runtime D3

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Runtime suspends disabled all interrupts, so in order to get them back
fully we need to also do the HPD irq setup on runtime resume. Except
on VLV/CHV where the display interrupt initialization is part of the
display power well powerup.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ce3bd0c..b4c0b58 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1552,6 +1552,15 @@ static int intel_runtime_resume(struct device *device)
 	gen6_update_ring_freq(dev);
 
 	intel_runtime_pm_enable_interrupts(dev_priv);
+
+	/*
+	 * On VLV/CHV display interrupts are part of the display
+	 * power well, so hpd is reinitialized from there. For
+	 * everyone else do it here.
+	 */
+	if (!IS_VALLEYVIEW(dev_priv))
+		intel_hpd_init(dev_priv);
+
 	intel_enable_gt_powersave(dev);
 
 	if (ret)
-- 
2.4.6

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[PATCH 14/17] drm/i915: Rewrite bxt_hpd_handler() to look like everyone else

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

bxt_hpd_handler() looks different to everyone else for no good reason.
Rewrite it to use the standard variable namees etc.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 37 ++++++++++++++++---------------------
 1 file changed, 16 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 53e51b5..f7f18a9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2122,27 +2122,17 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
 	return ret;
 }
 
-static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
+static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 hp_control, hp_trigger;
-	u32 pin_mask = 0, long_mask = 0;
-
-	/* Get the status */
-	hp_trigger = iir_status & BXT_DE_PORT_HOTPLUG_MASK;
-	hp_control = I915_READ(BXT_HOTPLUG_CTL);
-
-	/* Hotplug not enabled ? */
-	if (!(hp_control & BXT_HOTPLUG_CTL_MASK)) {
-		DRM_ERROR("Interrupt when HPD disabled\n");
-		return;
-	}
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
 
-	/* Clear sticky bits in hpd status */
-	I915_WRITE(BXT_HOTPLUG_CTL, hp_control);
+	dig_hotplug_reg = I915_READ(BXT_HOTPLUG_CTL);
+	I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
 
-	intel_get_hpd_pins(&pin_mask, &long_mask, hp_trigger, hp_control,
-			   hpd_bxt, bxt_port_hotplug_long_detect);
+	intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+			   dig_hotplug_reg, hpd_bxt,
+			   bxt_port_hotplug_long_detect);
 	intel_hpd_irq_handler(dev, pin_mask, long_mask);
 }
 
@@ -2192,7 +2182,12 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 		tmp = I915_READ(GEN8_DE_PORT_IIR);
 		if (tmp) {
 			bool found = false;
-			u32 hotplug_trigger = tmp & GEN8_PORT_DP_A_HOTPLUG;
+			u32 hotplug_trigger = 0;
+
+			if (IS_BROXTON(dev_priv))
+				hotplug_trigger = tmp & BXT_DE_PORT_HOTPLUG_MASK;
+			else if (IS_BROADWELL(dev_priv))
+				hotplug_trigger = tmp & GEN8_PORT_DP_A_HOTPLUG;
 
 			I915_WRITE(GEN8_DE_PORT_IIR, tmp);
 			ret = IRQ_HANDLED;
@@ -2215,8 +2210,8 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 				found = true;
 			}
 
-			if (IS_BROXTON(dev) && tmp & BXT_DE_PORT_HOTPLUG_MASK) {
-				bxt_hpd_handler(dev, tmp);
+			if (IS_BROXTON(dev) && hotplug_trigger) {
+				bxt_hpd_irq_handler(dev, hotplug_trigger);
 				found = true;
 			}
 
-- 
2.4.6

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[PATCH 15/17] drm/i915: Refactor the hpd irq handling functions

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

A lot of the hpd irq handling is duplicated code, so refactor it a bit
by observing that in several places the only difference is the hpd[]
array. So pull the code to a few functions and pass in the hpd[] array
from the caller. Another option would be to determine the correct array
to use within the functions themselves, but somehow passing it in felt
nicer.

Further code reduction could be achieved by passing in the hotplug
register offset, and the long pulse detection function pointer. But that
didn't feel as good for some reason, so I left it at the middle ground.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 112 ++++++++++++++++++----------------------
 1 file changed, 49 insertions(+), 63 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f7f18a9..a7c4efb 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1742,23 +1742,30 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 	return ret;
 }
 
+static void ibx_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
+				const u32 hpd[HPD_NUM_PINS])
+{
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
+
+	dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
+	I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
+
+	intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+			   dig_hotplug_reg, hpd,
+			   pch_port_hotplug_long_detect);
+
+	intel_hpd_irq_handler(dev, pin_mask, long_mask);
+}
+
 static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int pipe;
 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
 
-	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
-
-		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
-		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
-
-		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-				   dig_hotplug_reg, hpd_ibx,
-				   pch_port_hotplug_long_detect);
-		intel_hpd_irq_handler(dev, pin_mask, long_mask);
-	}
+	if (hotplug_trigger)
+		ibx_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx);
 
 	if (pch_iir & SDE_AUDIO_POWER_MASK) {
 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK) >>
@@ -1851,19 +1858,8 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
 	int pipe;
 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
 
-	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
-
-		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
-		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
-
-		intel_get_hpd_pins(&pin_mask, &long_mask,
-				   hotplug_trigger,
-				   dig_hotplug_reg, hpd_cpt,
-				   pch_port_hotplug_long_detect);
-
-		intel_hpd_irq_handler(dev, pin_mask, long_mask);
-	}
+	if (hotplug_trigger)
+		ibx_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt);
 
 	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
@@ -1931,23 +1927,30 @@ static void spt_irq_handler(struct drm_device *dev, u32 pch_iir)
 		gmbus_irq_handler(dev);
 }
 
+static void ilk_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
+				const u32 hpd[HPD_NUM_PINS])
+{
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
+
+	dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
+	I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
+
+	intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+			   dig_hotplug_reg, hpd,
+			   ilk_port_hotplug_long_detect);
+
+	intel_hpd_irq_handler(dev, pin_mask, long_mask);
+}
+
 static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	enum pipe pipe;
 	u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
 
-	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
-
-		dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
-		I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
-
-		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-				   dig_hotplug_reg, hpd_ilk,
-				   ilk_port_hotplug_long_detect);
-		intel_hpd_irq_handler(dev, pin_mask, long_mask);
-	}
+	if (hotplug_trigger)
+		ilk_hpd_irq_handler(dev, hotplug_trigger, hpd_ilk);
 
 	if (de_iir & DE_AUX_CHANNEL_A)
 		dp_aux_irq_handler(dev);
@@ -1999,17 +2002,8 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
 	enum pipe pipe;
 	u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
 
-	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
-
-		dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
-		I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
-
-		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-				   dig_hotplug_reg, hpd_ivb,
-				   ilk_port_hotplug_long_detect);
-		intel_hpd_irq_handler(dev, pin_mask, long_mask);
-	}
+	if (hotplug_trigger)
+		ilk_hpd_irq_handler(dev, hotplug_trigger, hpd_ivb);
 
 	if (de_iir & DE_ERR_INT_IVB)
 		ivb_err_int_handler(dev);
@@ -2122,7 +2116,8 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
 	return ret;
 }
 
-static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger)
+static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
+				const u32 hpd[HPD_NUM_PINS])
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
@@ -2131,8 +2126,9 @@ static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger)
 	I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
 
 	intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-			   dig_hotplug_reg, hpd_bxt,
+			   dig_hotplug_reg, hpd,
 			   bxt_port_hotplug_long_detect);
+
 	intel_hpd_irq_handler(dev, pin_mask, long_mask);
 }
 
@@ -2192,26 +2188,16 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 			I915_WRITE(GEN8_DE_PORT_IIR, tmp);
 			ret = IRQ_HANDLED;
 
-			if (IS_BROADWELL(dev) && hotplug_trigger) {
-				u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
-
-				dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
-				I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
-
-				intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-						   dig_hotplug_reg, hpd_bdw,
-						   ilk_port_hotplug_long_detect);
-				intel_hpd_irq_handler(dev, pin_mask, long_mask);
-				found = true;
-			}
-
 			if (tmp & aux_mask) {
 				dp_aux_irq_handler(dev);
 				found = true;
 			}
 
-			if (IS_BROXTON(dev) && hotplug_trigger) {
-				bxt_hpd_irq_handler(dev, hotplug_trigger);
+			if (hotplug_trigger) {
+				if (IS_BROXTON(dev))
+					bxt_hpd_irq_handler(dev, hotplug_trigger, hpd_bxt);
+				else
+					ilk_hpd_irq_handler(dev, hotplug_trigger, hpd_bdw);
 				found = true;
 			}
 
-- 
2.4.6

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[PATCH 16/17] drm/i915: Rewrite BXT HPD code to conform to pre-existing style

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rewrite the BXT hpd setup to match the way we do it on other platforms:
- Throw out BXT_HOTPLUG_CTL since it's the same as PCH_PORT_HOTPLUG
- Enable the HPD bits in the DE port IER in gen8_de_irq_postinstall()
- Update DE port IMR using bdw_update_port_irq()

Also throw out port D from bxt_port_hotplug_long_detect() since BXT only
goes up to C.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 36 +++++++++++++-----------------------
 drivers/gpu/drm/i915/i915_reg.h | 15 ---------------
 2 files changed, 13 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a7c4efb..1a29dfd 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1300,8 +1300,6 @@ static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
 		return val & PORTB_HOTPLUG_LONG_DETECT;
 	case PORT_C:
 		return val & PORTC_HOTPLUG_LONG_DETECT;
-	case PORT_D:
-		return val & PORTD_HOTPLUG_LONG_DETECT;
 	default:
 		return false;
 	}
@@ -2122,8 +2120,8 @@ static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
 
-	dig_hotplug_reg = I915_READ(BXT_HOTPLUG_CTL);
-	I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
+	dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
+	I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
 
 	intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
 			   dig_hotplug_reg, hpd,
@@ -3241,27 +3239,17 @@ static void ilk_hpd_irq_setup(struct drm_device *dev)
 static void bxt_hpd_irq_setup(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u32 hotplug_port;
-	u32 hotplug_ctrl;
-
-	hotplug_port = intel_hpd_enabled_irqs(dev, hpd_bxt);
-
-	hotplug_ctrl = I915_READ(BXT_HOTPLUG_CTL) & ~BXT_HOTPLUG_CTL_MASK;
+	u32 hotplug_irqs, hotplug, enabled_irqs;
 
-	if (hotplug_port & BXT_DE_PORT_HP_DDIA)
-		hotplug_ctrl |= BXT_DDIA_HPD_ENABLE;
-	if (hotplug_port & BXT_DE_PORT_HP_DDIB)
-		hotplug_ctrl |= BXT_DDIB_HPD_ENABLE;
-	if (hotplug_port & BXT_DE_PORT_HP_DDIC)
-		hotplug_ctrl |= BXT_DDIC_HPD_ENABLE;
-	I915_WRITE(BXT_HOTPLUG_CTL, hotplug_ctrl);
+	enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_bxt);
+	hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK;
 
-	hotplug_ctrl = I915_READ(GEN8_DE_PORT_IMR) & ~hotplug_port;
-	I915_WRITE(GEN8_DE_PORT_IMR, hotplug_ctrl);
+	bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
 
-	hotplug_ctrl = I915_READ(GEN8_DE_PORT_IER) | hotplug_port;
-	I915_WRITE(GEN8_DE_PORT_IER, hotplug_ctrl);
-	POSTING_READ(GEN8_DE_PORT_IER);
+	hotplug = I915_READ(PCH_PORT_HOTPLUG);
+	hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
+		PORTA_HOTPLUG_ENABLE;
+	I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
 }
 
 static void ibx_irq_postinstall(struct drm_device *dev)
@@ -3555,7 +3543,9 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 					   GEN8_PIPE_FIFO_UNDERRUN;
 
 	de_port_enables = de_port_masked;
-	if (IS_BROADWELL(dev_priv))
+	if (IS_BROXTON(dev_priv))
+		de_port_enables |= BXT_DE_PORT_HOTPLUG_MASK;
+	else if (IS_BROADWELL(dev_priv))
 		de_port_enables |= GEN8_PORT_DP_A_HOTPLUG;
 
 	dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0fc8888..8abae83 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5787,21 +5787,6 @@ enum skl_disp_power_wells {
 #define GEN8_PCU_IIR 0x444e8
 #define GEN8_PCU_IER 0x444ec
 
-/* BXT hotplug control */
-#define BXT_HOTPLUG_CTL			0xC4030
-#define   BXT_DDIA_HPD_ENABLE		(1 << 28)
-#define   BXT_DDIA_HPD_STATUS		(3 << 24)
-#define   BXT_DDIC_HPD_ENABLE		(1 << 12)
-#define   BXT_DDIC_HPD_STATUS		(3 << 8)
-#define   BXT_DDIB_HPD_ENABLE		(1 << 4)
-#define   BXT_DDIB_HPD_STATUS		(3 << 0)
-#define   BXT_HOTPLUG_CTL_MASK		(BXT_DDIA_HPD_ENABLE | \
-					 BXT_DDIB_HPD_ENABLE | \
-					 BXT_DDIC_HPD_ENABLE)
-#define   BXT_HPD_STATUS_MASK		(BXT_DDIA_HPD_STATUS | \
-					 BXT_DDIB_HPD_STATUS | \
-					 BXT_DDIC_HPD_STATUS)
-
 #define ILK_DISPLAY_CHICKEN2	0x42004
 /* Required on all Ironlake and Sandybridge according to the B-Spec. */
 #define  ILK_ELPIN_409_SELECT	(1 << 25)
-- 
2.4.6

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[PATCH 17/17] drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pass the correct hpd[] array to intel_get_hpd_pins() on pre-g4x
platforms.

This got broken in the following commit:
commit fd63e2a972c670887e5e8a08440111d3812c0996
Author: Imre Deak <imre.deak@intel.com>
Date:   Tue Jul 21 15:32:44 2015 -0700

    drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1a29dfd..9866739 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1644,7 +1644,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
 		u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
 
 		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-				   hotplug_trigger, hpd_status_g4x,
+				   hotplug_trigger, hpd_status_i915,
 				   i9xx_port_hotplug_long_detect);
 		intel_hpd_irq_handler(dev, pin_mask, long_mask);
 	}
-- 
2.4.6

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Re: [PATCH v2 00/17] drm/i915: Port A HPD and other HPD cleanups

[Ville Syrjälä]

On Thu, Aug 27, 2015 at 11:55:55PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Second posting of the HPD port A series, with some new added goodies
> at the end ;)
> 
> I tried to accomodate Paulo's review comments on v1 of the series [1]
> and noticed a few other warts myself that I tried to sort out. Additonally
> I added a bunch of BXT cleanups to the end, and an extra regression
> fix for gen2-4.
> 
> I've not had time to test this version yet. I'll try to do that soon,
> and especially give it a shakedown on a BXT.

Tested on BXT now. At laest port C HPD (HDMI on the board I have) works.

Not quite sure about the port A vs. B swapping. There seems to be a bit
of a mess around those parts with intel_hpd_pin_to_port() vs. irq_port[]
vs. hpd_pin. The way I see it we should not be messing with the
irq_port[] assignment and instead intel_hpd_pin_to_port() should do the
right thing with the swapped pins, but currently that's not how it is.
But since it's only BXT A-step that's affected, I'm not sure there's any
point in spending time to handle it more cleanly.

> 
> The entire series is available at
> git://github.com/vsyrjala/linux.git port_a_hotplug_7
> 
> [1] http://lists.freedesktop.org/archives/intel-gfx/2015-August/073559.html 
> 
> Ville Syrjälä (17):
>   drm/i915: Clean up various HPD defines
>   drm/i915: Extract intel_hpd_enabled_irqs()
>   drm/i915: Factor out ilk_update_display_irq()
>   drm/i915: Add HAS_PCH_LPT_LP() macro
>   drm/i915: Rename BXT PORTA HPD defines
>   drm/i915: Move {pin,long}_mask initialization to caller from
>     intel_get_hpd_pins()
>   drm/i915: Introduce spt_irq_handler()
>   drm/i915: Add port A HPD support for ILK/SNB
>   drm/i915: Add port A HPD support for IVB/HSW
>   drm/i915: LPT:LP needs port A HPD enabled in both north and south
>   drm/i915: Add port A HPD support for BDW
>   drm/i915: Add port A HPD support for SPT
>   drm/i915: Reinitialize HPD after runtime D3
>   drm/i915: Rewrite bxt_hpd_handler() to look like everyone else
>   drm/i915: Refactor the hpd irq handling functions
>   drm/i915: Rewrite BXT HPD code to conform to pre-existing style
>   drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x
> 
>  drivers/gpu/drm/i915/i915_drv.c      |   9 +
>  drivers/gpu/drm/i915/i915_drv.h      |   1 +
>  drivers/gpu/drm/i915/i915_irq.c      | 477 ++++++++++++++++++++++++-----------
>  drivers/gpu/drm/i915/i915_reg.h      |  99 ++++----
>  drivers/gpu/drm/i915/intel_display.c |  13 +-
>  drivers/gpu/drm/i915/intel_pm.c      |   4 +-
>  6 files changed, 390 insertions(+), 213 deletions(-)
> 
> -- 
> 2.4.6

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH 06/17] drm/i915: Move {pin, long}_mask initialization to caller from intel_get_hpd_pins()

[Paulo Zanoni]

2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move the 0 initialization of pin_mask and long_mask from
> intel_get_hpd_pins() into each caller. This we we can call
> intel_get_hpd_pins() multiple times to accumulate more pins from several
> sources.

Hmm... I'm not a big fan of this approach since it makes the code more
dangerous. I wouldn't be surprised if next year we discover that the
code for the next hardware generation forgot to zero-initialize the
variables. You know, programmers from the future are always really
bad.

You could at least write a small comment at the top of
intel_get_hpd_pins() telling the callers to clear their masks first.

I would still prefer my original suggestion of having 2 variables for
people who call this twice, but this one is correct, so:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 3388b64..db27945 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1301,9 +1301,6 @@ static void intel_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
>         enum port port;
>         int i;
>
> -       *pin_mask = 0;
> -       *long_mask = 0;
> -
>         for_each_hpd_pin(i) {
>                 if ((hpd[i] & hotplug_trigger) == 0)
>                         continue;
> @@ -1544,7 +1541,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
> -       u32 pin_mask, long_mask;
> +       u32 pin_mask = 0, long_mask = 0;
>
>         if (!hotplug_status)
>                 return;
> @@ -1673,7 +1670,7 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
>         u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
>
>         if (hotplug_trigger) {
> -               u32 dig_hotplug_reg, pin_mask, long_mask;
> +               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
>
>                 dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
>                 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> @@ -1781,7 +1778,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
>                 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
>
>         if (hotplug_trigger) {
> -               u32 dig_hotplug_reg, pin_mask, long_mask;
> +               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
>
>                 dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
>                 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> @@ -2004,7 +2001,7 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         u32 hp_control, hp_trigger;
> -       u32 pin_mask, long_mask;
> +       u32 pin_mask = 0, long_mask = 0;
>
>         /* Get the status */
>         hp_trigger = iir_status & BXT_DE_PORT_HOTPLUG_MASK;
> --
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
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Re: [PATCH v2 07/17] drm/i915: Introduce spt_irq_handler()

[Paulo Zanoni]

2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Starting from SPT the only interrupts living in the south are GMBUS and
> HPD. What's worse some of the SPT specific new bits conflict with some
> other bits on earlier PCH generations. So better not use the
> cpt_irq_handler() for SPT+ anymore.
>
> Also kill the hand rolled port E handling with something more
> standardish. This also avoids accidentally confusing port B and port E
> long pulses since the bits occupy the same positions, just in different
> registers.
>
> Also add a comment noting that the short pulse duration bits are
> reserved on LPT+. The 2ms value we program is 0, so no issue wrt. the
> MBZ in the spec.
>
> v2: Call intel_hpd_irq_handler() only once (Paulo)
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 124 +++++++++++++++++++++++++++-------------
>  1 file changed, 84 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index db27945..978a528 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1262,6 +1262,16 @@ static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
>         }
>  }
>
> +static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
> +{
> +       switch (port) {
> +       case PORT_E:
> +               return val & PORTE_HOTPLUG_LONG_DETECT;
> +       default:
> +               return false;
> +       }
> +}
> +
>  static bool pch_port_hotplug_long_detect(enum port port, u32 val)
>  {
>         switch (port) {
> @@ -1271,8 +1281,6 @@ static bool pch_port_hotplug_long_detect(enum port port, u32 val)
>                 return val & PORTC_HOTPLUG_LONG_DETECT;
>         case PORT_D:
>                 return val & PORTD_HOTPLUG_LONG_DETECT;
> -       case PORT_E:
> -               return val & PORTE_HOTPLUG_LONG_DETECT;
>         default:
>                 return false;
>         }
> @@ -1770,12 +1778,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         int pipe;
> -       u32 hotplug_trigger;
> -
> -       if (HAS_PCH_SPT(dev))
> -               hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT;
> -       else
> -               hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
> +       u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
>
>         if (hotplug_trigger) {
>                 u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> @@ -1783,22 +1786,10 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
>                 dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
>                 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
>
> -               if (HAS_PCH_SPT(dev)) {
> -                       intel_get_hpd_pins(&pin_mask, &long_mask,
> -                                          hotplug_trigger,
> -                                          dig_hotplug_reg, hpd_spt,
> -                                          pch_port_hotplug_long_detect);
> -
> -                       /* detect PORTE HP event */
> -                       dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
> -                       if (pch_port_hotplug_long_detect(PORT_E,
> -                                                        dig_hotplug_reg))
> -                               long_mask |= 1 << HPD_PORT_E;
> -               } else
> -                       intel_get_hpd_pins(&pin_mask, &long_mask,
> -                                          hotplug_trigger,
> -                                          dig_hotplug_reg, hpd_cpt,
> -                                          pch_port_hotplug_long_detect);
> +               intel_get_hpd_pins(&pin_mask, &long_mask,
> +                                  hotplug_trigger,
> +                                  dig_hotplug_reg, hpd_cpt,
> +                                  pch_port_hotplug_long_detect);
>
>                 intel_hpd_irq_handler(dev, pin_mask, long_mask);
>         }
> @@ -1832,6 +1823,43 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
>                 cpt_serr_int_handler(dev);
>  }
>
> +static void spt_irq_handler(struct drm_device *dev, u32 pch_iir)
> +{
> +       struct drm_i915_private *dev_priv = dev->dev_private;
> +       u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
> +               ~SDE_PORTE_HOTPLUG_SPT;
> +       u32 hotplug2_trigger = pch_iir & SDE_PORTE_HOTPLUG_SPT;
> +       u32 pin_mask = 0, long_mask = 0;
> +
> +       if (hotplug_trigger) {
> +               u32 dig_hotplug_reg;
> +
> +               dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> +               I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> +
> +               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> +                                  dig_hotplug_reg, hpd_spt,
> +                                  pch_port_hotplug_long_detect);
> +       }
> +
> +       if (hotplug2_trigger) {
> +               u32 dig_hotplug_reg;
> +
> +               dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
> +               I915_WRITE(PCH_PORT_HOTPLUG2, dig_hotplug_reg);
> +
> +               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug2_trigger,
> +                                  dig_hotplug_reg, hpd_spt,
> +                                  spt_port_hotplug2_long_detect);
> +       }
> +
> +       if (pin_mask)
> +               intel_hpd_irq_handler(dev, pin_mask, long_mask);

intel_hpd_irq_handler() already checks for empty pin_mask.

I'm not sure if my arguments on patch 6 were enough to trigger a v3 of
this patch, so, in case you stay with the current patch 6, then, with
or without any of my suggestions:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> +
> +       if (pch_iir & SDE_GMBUS_CPT)
> +               gmbus_irq_handler(dev);
> +}
> +
>  static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -2150,7 +2178,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
>                 if (pch_iir) {
>                         I915_WRITE(SDEIIR, pch_iir);
>                         ret = IRQ_HANDLED;
> -                       cpt_irq_handler(dev, pch_iir);
> +
> +                       if (HAS_PCH_SPT(dev_priv))
> +                               spt_irq_handler(dev, pch_iir);
> +                       else
> +                               cpt_irq_handler(dev, pch_iir);
>                 } else
>                         DRM_ERROR("The master control interrupt lied (SDE)!\n");
>
> @@ -3032,9 +3064,6 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
>         if (HAS_PCH_IBX(dev)) {
>                 hotplug_irqs = SDE_HOTPLUG_MASK;
>                 enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ibx);
> -       } else if (HAS_PCH_SPT(dev)) {
> -               hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
> -               enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_spt);
>         } else {
>                 hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
>                 enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_cpt);
> @@ -3044,9 +3073,8 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
>
>         /*
>          * Enable digital hotplug on the PCH, and configure the DP short pulse
> -        * duration to 2ms (which is the minimum in the Display Port spec)
> -        *
> -        * This register is the same on all known PCH chips.
> +        * duration to 2ms (which is the minimum in the Display Port spec).
> +        * The pulse duration bits are reserved on LPT+.
>          */
>         hotplug = I915_READ(PCH_PORT_HOTPLUG);
>         hotplug &= ~(PORTD_PULSE_DURATION_MASK|PORTC_PULSE_DURATION_MASK|PORTB_PULSE_DURATION_MASK);
> @@ -3054,13 +3082,27 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
>         hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms;
>         hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms;
>         I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> +}
>
> -       /* enable SPT PORTE hot plug */
> -       if (HAS_PCH_SPT(dev)) {
> -               hotplug = I915_READ(PCH_PORT_HOTPLUG2);
> -               hotplug |= PORTE_HOTPLUG_ENABLE;
> -               I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);
> -       }
> +static void spt_hpd_irq_setup(struct drm_device *dev)
> +{
> +       struct drm_i915_private *dev_priv = dev->dev_private;
> +       u32 hotplug_irqs, hotplug, enabled_irqs;
> +
> +       hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
> +       enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_spt);
> +
> +       ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
> +
> +       /* Enable digital hotplug on the PCH */
> +       hotplug = I915_READ(PCH_PORT_HOTPLUG);
> +       hotplug |= PORTD_HOTPLUG_ENABLE | PORTC_HOTPLUG_ENABLE |
> +               PORTB_HOTPLUG_ENABLE;
> +       I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> +
> +       hotplug = I915_READ(PCH_PORT_HOTPLUG2);
> +       hotplug |= PORTE_HOTPLUG_ENABLE;
> +       I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);
>  }
>
>  static void bxt_hpd_irq_setup(struct drm_device *dev)
> @@ -4165,10 +4207,12 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
>                 dev->driver->irq_uninstall = gen8_irq_uninstall;
>                 dev->driver->enable_vblank = gen8_enable_vblank;
>                 dev->driver->disable_vblank = gen8_disable_vblank;
> -               if (HAS_PCH_SPLIT(dev))
> -                       dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
> -               else
> +               if (IS_BROXTON(dev))
>                         dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
> +               else if (HAS_PCH_SPT(dev))
> +                       dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
> +               else
> +                       dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
>         } else if (HAS_PCH_SPLIT(dev)) {
>                 dev->driver->irq_handler = ironlake_irq_handler;
>                 dev->driver->irq_preinstall = ironlake_irq_reset;
> --
> 2.4.6
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
_______________________________________________
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Re: [PATCH 06/17] drm/i915: Move {pin, long}_mask initialization to caller from intel_get_hpd_pins()

[Ville Syrjälä]

On Fri, Aug 28, 2015 at 03:01:50PM -0300, Paulo Zanoni wrote:
> 2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Move the 0 initialization of pin_mask and long_mask from
> > intel_get_hpd_pins() into each caller. This we we can call
> > intel_get_hpd_pins() multiple times to accumulate more pins from several
> > sources.
> 
> Hmm... I'm not a big fan of this approach since it makes the code more
> dangerous. I wouldn't be surprised if next year we discover that the
> code for the next hardware generation forgot to zero-initialize the
> variables. You know, programmers from the future are always really
> bad.

Yeah there's a slight danger. But after the series all the hpd handling
is rather uniform looking, so hopefully the future programmers will just
resort to copy-paste and get it right ;)

> 
> You could at least write a small comment at the top of
> intel_get_hpd_pins() telling the callers to clear their masks first.

Done.

> 
> I would still prefer my original suggestion of having 2 variables for
> people who call this twice, but this one is correct, so:
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c | 11 ++++-------
> >  1 file changed, 4 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 3388b64..db27945 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1301,9 +1301,6 @@ static void intel_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
> >         enum port port;
> >         int i;
> >
> > -       *pin_mask = 0;
> > -       *long_mask = 0;
> > -
> >         for_each_hpd_pin(i) {
> >                 if ((hpd[i] & hotplug_trigger) == 0)
> >                         continue;
> > @@ -1544,7 +1541,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> >         u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
> > -       u32 pin_mask, long_mask;
> > +       u32 pin_mask = 0, long_mask = 0;
> >
> >         if (!hotplug_status)
> >                 return;
> > @@ -1673,7 +1670,7 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
> >         u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
> >
> >         if (hotplug_trigger) {
> > -               u32 dig_hotplug_reg, pin_mask, long_mask;
> > +               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> >
> >                 dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> >                 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> > @@ -1781,7 +1778,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
> >                 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
> >
> >         if (hotplug_trigger) {
> > -               u32 dig_hotplug_reg, pin_mask, long_mask;
> > +               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> >
> >                 dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> >                 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> > @@ -2004,7 +2001,7 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> >         u32 hp_control, hp_trigger;
> > -       u32 pin_mask, long_mask;
> > +       u32 pin_mask = 0, long_mask = 0;
> >
> >         /* Get the status */
> >         hp_trigger = iir_status & BXT_DE_PORT_HOTPLUG_MASK;
> > --
> > 2.4.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
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[PATCH v2 06/17] drm/i915: Move {pin, long}_mask initialization to caller from intel_get_hpd_pins()

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the 0 initialization of pin_mask and long_mask from
intel_get_hpd_pins() into each caller. This we we can call
intel_get_hpd_pins() multiple times to accumulate more pins from several
sources.

v2: Add a comment explaining the dangers of intel_get_hpd_pins() (Paulo)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3388b64..7129389 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1292,7 +1292,13 @@ static bool i9xx_port_hotplug_long_detect(enum port port, u32 val)
 	}
 }
 
-/* Get a bit mask of pins that have triggered, and which ones may be long. */
+/*
+ * Get a bit mask of pins that have triggered, and which ones may be long.
+ * This can be called multiple times with the same masks to accumulate
+ * hotplug detection results from several registers.
+ *
+ * Note that the caller is expected to zero out the masks initially.
+ */
 static void intel_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
 			     u32 hotplug_trigger, u32 dig_hotplug_reg,
 			     const u32 hpd[HPD_NUM_PINS],
@@ -1301,9 +1307,6 @@ static void intel_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
 	enum port port;
 	int i;
 
-	*pin_mask = 0;
-	*long_mask = 0;
-
 	for_each_hpd_pin(i) {
 		if ((hpd[i] & hotplug_trigger) == 0)
 			continue;
@@ -1544,7 +1547,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
-	u32 pin_mask, long_mask;
+	u32 pin_mask = 0, long_mask = 0;
 
 	if (!hotplug_status)
 		return;
@@ -1673,7 +1676,7 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
 
 	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask, long_mask;
+		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
 
 		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
 		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
@@ -1781,7 +1784,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
 		hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
 
 	if (hotplug_trigger) {
-		u32 dig_hotplug_reg, pin_mask, long_mask;
+		u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
 
 		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
 		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
@@ -2004,7 +2007,7 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 hp_control, hp_trigger;
-	u32 pin_mask, long_mask;
+	u32 pin_mask = 0, long_mask = 0;
 
 	/* Get the status */
 	hp_trigger = iir_status & BXT_DE_PORT_HOTPLUG_MASK;
-- 
2.4.6

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Re: [PATCH v2 07/17] drm/i915: Introduce spt_irq_handler()

[Ville Syrjälä]

On Fri, Aug 28, 2015 at 03:20:33PM -0300, Paulo Zanoni wrote:
> 2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Starting from SPT the only interrupts living in the south are GMBUS and
> > HPD. What's worse some of the SPT specific new bits conflict with some
> > other bits on earlier PCH generations. So better not use the
> > cpt_irq_handler() for SPT+ anymore.
> >
> > Also kill the hand rolled port E handling with something more
> > standardish. This also avoids accidentally confusing port B and port E
> > long pulses since the bits occupy the same positions, just in different
> > registers.
> >
> > Also add a comment noting that the short pulse duration bits are
> > reserved on LPT+. The 2ms value we program is 0, so no issue wrt. the
> > MBZ in the spec.
> >
> > v2: Call intel_hpd_irq_handler() only once (Paulo)
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c | 124 +++++++++++++++++++++++++++-------------
> >  1 file changed, 84 insertions(+), 40 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index db27945..978a528 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1262,6 +1262,16 @@ static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
> >         }
> >  }
> >
> > +static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
> > +{
> > +       switch (port) {
> > +       case PORT_E:
> > +               return val & PORTE_HOTPLUG_LONG_DETECT;
> > +       default:
> > +               return false;
> > +       }
> > +}
> > +
> >  static bool pch_port_hotplug_long_detect(enum port port, u32 val)
> >  {
> >         switch (port) {
> > @@ -1271,8 +1281,6 @@ static bool pch_port_hotplug_long_detect(enum port port, u32 val)
> >                 return val & PORTC_HOTPLUG_LONG_DETECT;
> >         case PORT_D:
> >                 return val & PORTD_HOTPLUG_LONG_DETECT;
> > -       case PORT_E:
> > -               return val & PORTE_HOTPLUG_LONG_DETECT;
> >         default:
> >                 return false;
> >         }
> > @@ -1770,12 +1778,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> >         int pipe;
> > -       u32 hotplug_trigger;
> > -
> > -       if (HAS_PCH_SPT(dev))
> > -               hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT;
> > -       else
> > -               hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
> > +       u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
> >
> >         if (hotplug_trigger) {
> >                 u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> > @@ -1783,22 +1786,10 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
> >                 dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> >                 I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> >
> > -               if (HAS_PCH_SPT(dev)) {
> > -                       intel_get_hpd_pins(&pin_mask, &long_mask,
> > -                                          hotplug_trigger,
> > -                                          dig_hotplug_reg, hpd_spt,
> > -                                          pch_port_hotplug_long_detect);
> > -
> > -                       /* detect PORTE HP event */
> > -                       dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
> > -                       if (pch_port_hotplug_long_detect(PORT_E,
> > -                                                        dig_hotplug_reg))
> > -                               long_mask |= 1 << HPD_PORT_E;
> > -               } else
> > -                       intel_get_hpd_pins(&pin_mask, &long_mask,
> > -                                          hotplug_trigger,
> > -                                          dig_hotplug_reg, hpd_cpt,
> > -                                          pch_port_hotplug_long_detect);
> > +               intel_get_hpd_pins(&pin_mask, &long_mask,
> > +                                  hotplug_trigger,
> > +                                  dig_hotplug_reg, hpd_cpt,
> > +                                  pch_port_hotplug_long_detect);
> >
> >                 intel_hpd_irq_handler(dev, pin_mask, long_mask);
> >         }
> > @@ -1832,6 +1823,43 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
> >                 cpt_serr_int_handler(dev);
> >  }
> >
> > +static void spt_irq_handler(struct drm_device *dev, u32 pch_iir)
> > +{
> > +       struct drm_i915_private *dev_priv = dev->dev_private;
> > +       u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
> > +               ~SDE_PORTE_HOTPLUG_SPT;
> > +       u32 hotplug2_trigger = pch_iir & SDE_PORTE_HOTPLUG_SPT;
> > +       u32 pin_mask = 0, long_mask = 0;
> > +
> > +       if (hotplug_trigger) {
> > +               u32 dig_hotplug_reg;
> > +
> > +               dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> > +               I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> > +
> > +               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > +                                  dig_hotplug_reg, hpd_spt,
> > +                                  pch_port_hotplug_long_detect);
> > +       }
> > +
> > +       if (hotplug2_trigger) {
> > +               u32 dig_hotplug_reg;
> > +
> > +               dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG2);
> > +               I915_WRITE(PCH_PORT_HOTPLUG2, dig_hotplug_reg);
> > +
> > +               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug2_trigger,
> > +                                  dig_hotplug_reg, hpd_spt,
> > +                                  spt_port_hotplug2_long_detect);
> > +       }
> > +
> > +       if (pin_mask)
> > +               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> 
> intel_hpd_irq_handler() already checks for empty pin_mask.

I was hoping doing the check here would be cheaper. Otherwise we would
do the function call every time there's a south interrupt, only to
return immediately. Well, gmbus being the only other source of south
interrupts, this might make gmbus handling a bit cheaper...

> 
> I'm not sure if my arguments on patch 6 were enough to trigger a v3 of
> this patch, so, in case you stay with the current patch 6, then, with
> or without any of my suggestions:
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> > +
> > +       if (pch_iir & SDE_GMBUS_CPT)
> > +               gmbus_irq_handler(dev);
> > +}
> > +
> >  static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> > @@ -2150,7 +2178,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
> >                 if (pch_iir) {
> >                         I915_WRITE(SDEIIR, pch_iir);
> >                         ret = IRQ_HANDLED;
> > -                       cpt_irq_handler(dev, pch_iir);
> > +
> > +                       if (HAS_PCH_SPT(dev_priv))
> > +                               spt_irq_handler(dev, pch_iir);
> > +                       else
> > +                               cpt_irq_handler(dev, pch_iir);
> >                 } else
> >                         DRM_ERROR("The master control interrupt lied (SDE)!\n");
> >
> > @@ -3032,9 +3064,6 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
> >         if (HAS_PCH_IBX(dev)) {
> >                 hotplug_irqs = SDE_HOTPLUG_MASK;
> >                 enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ibx);
> > -       } else if (HAS_PCH_SPT(dev)) {
> > -               hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
> > -               enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_spt);
> >         } else {
> >                 hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
> >                 enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_cpt);
> > @@ -3044,9 +3073,8 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
> >
> >         /*
> >          * Enable digital hotplug on the PCH, and configure the DP short pulse
> > -        * duration to 2ms (which is the minimum in the Display Port spec)
> > -        *
> > -        * This register is the same on all known PCH chips.
> > +        * duration to 2ms (which is the minimum in the Display Port spec).
> > +        * The pulse duration bits are reserved on LPT+.
> >          */
> >         hotplug = I915_READ(PCH_PORT_HOTPLUG);
> >         hotplug &= ~(PORTD_PULSE_DURATION_MASK|PORTC_PULSE_DURATION_MASK|PORTB_PULSE_DURATION_MASK);
> > @@ -3054,13 +3082,27 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
> >         hotplug |= PORTC_HOTPLUG_ENABLE | PORTC_PULSE_DURATION_2ms;
> >         hotplug |= PORTB_HOTPLUG_ENABLE | PORTB_PULSE_DURATION_2ms;
> >         I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> > +}
> >
> > -       /* enable SPT PORTE hot plug */
> > -       if (HAS_PCH_SPT(dev)) {
> > -               hotplug = I915_READ(PCH_PORT_HOTPLUG2);
> > -               hotplug |= PORTE_HOTPLUG_ENABLE;
> > -               I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);
> > -       }
> > +static void spt_hpd_irq_setup(struct drm_device *dev)
> > +{
> > +       struct drm_i915_private *dev_priv = dev->dev_private;
> > +       u32 hotplug_irqs, hotplug, enabled_irqs;
> > +
> > +       hotplug_irqs = SDE_HOTPLUG_MASK_SPT;
> > +       enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_spt);
> > +
> > +       ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
> > +
> > +       /* Enable digital hotplug on the PCH */
> > +       hotplug = I915_READ(PCH_PORT_HOTPLUG);
> > +       hotplug |= PORTD_HOTPLUG_ENABLE | PORTC_HOTPLUG_ENABLE |
> > +               PORTB_HOTPLUG_ENABLE;
> > +       I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
> > +
> > +       hotplug = I915_READ(PCH_PORT_HOTPLUG2);
> > +       hotplug |= PORTE_HOTPLUG_ENABLE;
> > +       I915_WRITE(PCH_PORT_HOTPLUG2, hotplug);
> >  }
> >
> >  static void bxt_hpd_irq_setup(struct drm_device *dev)
> > @@ -4165,10 +4207,12 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> >                 dev->driver->irq_uninstall = gen8_irq_uninstall;
> >                 dev->driver->enable_vblank = gen8_enable_vblank;
> >                 dev->driver->disable_vblank = gen8_disable_vblank;
> > -               if (HAS_PCH_SPLIT(dev))
> > -                       dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
> > -               else
> > +               if (IS_BROXTON(dev))
> >                         dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
> > +               else if (HAS_PCH_SPT(dev))
> > +                       dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
> > +               else
> > +                       dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
> >         } else if (HAS_PCH_SPLIT(dev)) {
> >                 dev->driver->irq_handler = ironlake_irq_handler;
> >                 dev->driver->irq_preinstall = ironlake_irq_reset;
> > --
> > 2.4.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Ville Syrjälä
Intel OTC
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[PATCH 18/17] drm/i915: Don't call intel_get_hpd_pins() when there's no hotplug interrupt

[ville.syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On GMCH plaforms we are now getting the following spew on aux
interrupts:
[drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
[drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
[drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
[drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
[drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
[drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064

Prevent it by not calling intel_get_hpd_pins() unless one of the HPD
interrupt bits are actually set.

I already fixed similar annoyance once with
4bca26d0a6518d51a9abe64fbde4b12f04c74053 drm/i915: Use HOTPLUG_INT_STATUS_G4X on VLV/CHV

but another source for it got added in
fd63e2a972c670887e5e8a08440111d3812c0996 drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins

due to pch_get_hpd_pins() being chosen over i9xx_get_hpd_pins() to
serve as the new unified piece of code. pch_get_hpd_pins() had the debug
print, and i9xx_get_hpd_pins() didn't.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 610d301..07e539d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1639,20 +1639,26 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
 	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
 		u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
 
-		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-				   hotplug_trigger, hpd_status_g4x,
-				   i9xx_port_hotplug_long_detect);
-		intel_hpd_irq_handler(dev, pin_mask, long_mask);
+		if (hotplug_trigger) {
+			intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+					   hotplug_trigger, hpd_status_g4x,
+					   i9xx_port_hotplug_long_detect);
+
+			intel_hpd_irq_handler(dev, pin_mask, long_mask);
+		}
 
 		if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
 			dp_aux_irq_handler(dev);
 	} else {
 		u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
 
-		intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-				   hotplug_trigger, hpd_status_i915,
-				   i9xx_port_hotplug_long_detect);
-		intel_hpd_irq_handler(dev, pin_mask, long_mask);
+		if (hotplug_trigger) {
+			intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
+					   hotplug_trigger, hpd_status_i915,
+					   i9xx_port_hotplug_long_detect);
+
+			intel_hpd_irq_handler(dev, pin_mask, long_mask);
+		}
 	}
 }
 
-- 
2.4.6

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Re: [PATCH v2 11/17] drm/i915: Add port A HPD support for BDW

[Paulo Zanoni]

2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Wire up the port A HPD for BDW. Compared to earlier platforms the
> interrupt setup is a bit different, but basically everything else
> looks the same.
>
> v2: 0 initialize pin_mask/long_mask due to intel_get_hpd_pins() changes
>     Check for BDW before processing the HPD to not break BXT
>     Set found=true when processing port A HPD
>     Sort out the mess I made of the irq setup in v1

Ouch for the one above. So xx_port_masked should actually be
xx_port_unmask. That is very confusing. I know, not your fault, but
maybe you can just decide to fix it.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>     Warn about bad irq mask vs. enable bits in bdw_update_port_irq()  (Paulo)
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 86 +++++++++++++++++++++++++++++++++++------
>  1 file changed, 74 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 886518d..4d1533c 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -53,6 +53,10 @@ static const u32 hpd_ivb[HPD_NUM_PINS] = {
>         [HPD_PORT_A] = DE_DP_A_HOTPLUG_IVB,
>  };
>
> +static const u32 hpd_bdw[HPD_NUM_PINS] = {
> +       [HPD_PORT_A] = GEN8_PORT_DP_A_HOTPLUG,
> +};
> +
>  static const u32 hpd_ibx[HPD_NUM_PINS] = {
>         [HPD_CRT] = SDE_CRT_HOTPLUG,
>         [HPD_SDVO_B] = SDE_SDVOB_HOTPLUG,
> @@ -371,6 +375,38 @@ void gen6_disable_rps_interrupts(struct drm_device *dev)
>  }
>
>  /**
> +  * bdw_update_port_irq - update DE port interrupt
> +  * @dev_priv: driver private
> +  * @interrupt_mask: mask of interrupt bits to update
> +  * @enabled_irq_mask: mask of interrupt bits to enable
> +  */
> +static void bdw_update_port_irq(struct drm_i915_private *dev_priv,
> +                               uint32_t interrupt_mask,
> +                               uint32_t enabled_irq_mask)
> +{
> +       uint32_t new_val;
> +       uint32_t old_val;
> +
> +       assert_spin_locked(&dev_priv->irq_lock);
> +
> +       WARN_ON(enabled_irq_mask & ~interrupt_mask);
> +
> +       if (WARN_ON(!intel_irqs_enabled(dev_priv)))
> +               return;
> +
> +       old_val = I915_READ(GEN8_DE_PORT_IMR);
> +
> +       new_val = old_val;
> +       new_val &= ~interrupt_mask;
> +       new_val |= (~enabled_irq_mask & interrupt_mask);
> +
> +       if (new_val != old_val) {
> +               I915_WRITE(GEN8_DE_PORT_IMR, new_val);
> +               POSTING_READ(GEN8_DE_PORT_IMR);
> +       }
> +}
> +
> +/**
>   * ibx_display_interrupt_update - update SDEIMR
>   * @dev_priv: driver private
>   * @interrupt_mask: mask of interrupt bits to update
> @@ -2139,10 +2175,24 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
>                 tmp = I915_READ(GEN8_DE_PORT_IIR);
>                 if (tmp) {
>                         bool found = false;
> +                       u32 hotplug_trigger = tmp & GEN8_PORT_DP_A_HOTPLUG;
>
>                         I915_WRITE(GEN8_DE_PORT_IIR, tmp);
>                         ret = IRQ_HANDLED;
>
> +                       if (IS_BROADWELL(dev) && hotplug_trigger) {
> +                               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> +
> +                               dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
> +                               I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
> +
> +                               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> +                                                  dig_hotplug_reg, hpd_bdw,
> +                                                  ilk_port_hotplug_long_detect);
> +                               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> +                               found = true;
> +                       }
> +
>                         if (tmp & aux_mask) {
>                                 dp_aux_irq_handler(dev);
>                                 found = true;
> @@ -3160,15 +3210,22 @@ static void ilk_hpd_irq_setup(struct drm_device *dev)
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         u32 hotplug_irqs, hotplug, enabled_irqs;
>
> -       if (INTEL_INFO(dev)->gen >= 7) {
> +       if (INTEL_INFO(dev)->gen >= 8) {
> +               hotplug_irqs = GEN8_PORT_DP_A_HOTPLUG;
> +               enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_bdw);
> +
> +               bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
> +       } else if (INTEL_INFO(dev)->gen >= 7) {
>                 hotplug_irqs = DE_DP_A_HOTPLUG_IVB;
>                 enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ivb);
> +
> +               ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
>         } else {
>                 hotplug_irqs = DE_DP_A_HOTPLUG;
>                 enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_ilk);
> -       }
>
> -       ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
> +               ilk_update_display_irq(dev_priv, hotplug_irqs, enabled_irqs);
> +       }
>
>         /*
>          * Enable digital hotplug on the CPU, and configure the DP short pulse
> @@ -3480,24 +3537,29 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>  {
>         uint32_t de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE;
>         uint32_t de_pipe_enables;
> -       int pipe;
> -       u32 de_port_en = GEN8_AUX_CHANNEL_A;
> +       u32 de_port_masked = GEN8_AUX_CHANNEL_A;
> +       u32 de_port_enables;
> +       enum pipe pipe;
>
>         if (IS_GEN9(dev_priv)) {
>                 de_pipe_masked |= GEN9_PIPE_PLANE1_FLIP_DONE |
>                                   GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
> -               de_port_en |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
> -                       GEN9_AUX_CHANNEL_D;
> -
> +               de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
> +                                 GEN9_AUX_CHANNEL_D;
>                 if (IS_BROXTON(dev_priv))
> -                       de_port_en |= BXT_DE_PORT_GMBUS;
> -       } else
> +                       de_port_masked |= BXT_DE_PORT_GMBUS;
> +       } else {
>                 de_pipe_masked |= GEN8_PIPE_PRIMARY_FLIP_DONE |
>                                   GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
> +       }
>
>         de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
>                                            GEN8_PIPE_FIFO_UNDERRUN;
>
> +       de_port_enables = de_port_masked;
> +       if (IS_BROADWELL(dev_priv))
> +               de_port_enables |= GEN8_PORT_DP_A_HOTPLUG;
> +
>         dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
>         dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_masked;
>         dev_priv->de_irq_mask[PIPE_C] = ~de_pipe_masked;
> @@ -3509,7 +3571,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>                                           dev_priv->de_irq_mask[pipe],
>                                           de_pipe_enables);
>
> -       GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_en, de_port_en);
> +       GEN5_IRQ_INIT(GEN8_DE_PORT_, ~de_port_masked, de_port_enables);
>  }
>
>  static int gen8_irq_postinstall(struct drm_device *dev)
> @@ -4292,7 +4354,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
>                 else if (HAS_PCH_SPT(dev))
>                         dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
>                 else
> -                       dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
> +                       dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
>         } else if (HAS_PCH_SPLIT(dev)) {
>                 dev->driver->irq_handler = ironlake_irq_handler;
>                 dev->driver->irq_preinstall = ironlake_irq_reset;
> --
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 14/17] drm/i915: Rewrite bxt_hpd_handler() to look like everyone else

[Paulo Zanoni]

2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> bxt_hpd_handler() looks different to everyone else for no good reason.
> Rewrite it to use the standard variable namees etc.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 37 ++++++++++++++++---------------------
>  1 file changed, 16 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 53e51b5..f7f18a9 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2122,27 +2122,17 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>         return ret;
>  }
>
> -static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
> +static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger)
>  {
> -       struct drm_i915_private *dev_priv = dev->dev_private;
> -       u32 hp_control, hp_trigger;
> -       u32 pin_mask = 0, long_mask = 0;
> -
> -       /* Get the status */
> -       hp_trigger = iir_status & BXT_DE_PORT_HOTPLUG_MASK;
> -       hp_control = I915_READ(BXT_HOTPLUG_CTL);
> -
> -       /* Hotplug not enabled ? */
> -       if (!(hp_control & BXT_HOTPLUG_CTL_MASK)) {
> -               DRM_ERROR("Interrupt when HPD disabled\n");
> -               return;
> -       }
> +       struct drm_i915_private *dev_priv = to_i915(dev);
> +       u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
>
> -       /* Clear sticky bits in hpd status */
> -       I915_WRITE(BXT_HOTPLUG_CTL, hp_control);
> +       dig_hotplug_reg = I915_READ(BXT_HOTPLUG_CTL);
> +       I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
>
> -       intel_get_hpd_pins(&pin_mask, &long_mask, hp_trigger, hp_control,
> -                          hpd_bxt, bxt_port_hotplug_long_detect);
> +       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> +                          dig_hotplug_reg, hpd_bxt,
> +                          bxt_port_hotplug_long_detect);
>         intel_hpd_irq_handler(dev, pin_mask, long_mask);
>  }
>
> @@ -2192,7 +2182,12 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
>                 tmp = I915_READ(GEN8_DE_PORT_IIR);
>                 if (tmp) {
>                         bool found = false;
> -                       u32 hotplug_trigger = tmp & GEN8_PORT_DP_A_HOTPLUG;
> +                       u32 hotplug_trigger = 0;
> +
> +                       if (IS_BROXTON(dev_priv))
> +                               hotplug_trigger = tmp & BXT_DE_PORT_HOTPLUG_MASK;
> +                       else if (IS_BROADWELL(dev_priv))
> +                               hotplug_trigger = tmp & GEN8_PORT_DP_A_HOTPLUG;
>
>                         I915_WRITE(GEN8_DE_PORT_IIR, tmp);
>                         ret = IRQ_HANDLED;
> @@ -2215,8 +2210,8 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
>                                 found = true;
>                         }
>
> -                       if (IS_BROXTON(dev) && tmp & BXT_DE_PORT_HOTPLUG_MASK) {
> -                               bxt_hpd_handler(dev, tmp);
> +                       if (IS_BROXTON(dev) && hotplug_trigger) {
> +                               bxt_hpd_irq_handler(dev, hotplug_trigger);
>                                 found = true;
>                         }
>
> --
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 15/17] drm/i915: Refactor the hpd irq handling functions

[Paulo Zanoni]

2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> A lot of the hpd irq handling is duplicated code, so refactor it a bit
> by observing that in several places the only difference is the hpd[]
> array. So pull the code to a few functions and pass in the hpd[] array
> from the caller. Another option would be to determine the correct array
> to use within the functions themselves, but somehow passing it in felt
> nicer.
>
> Further code reduction could be achieved by passing in the hotplug
> register offset, and the long pulse detection function pointer. But that
> didn't feel as good for some reason, so I left it at the middle ground.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 112 ++++++++++++++++++----------------------
>  1 file changed, 49 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f7f18a9..a7c4efb 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1742,23 +1742,30 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
>         return ret;
>  }
>
> +static void ibx_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
> +                               const u32 hpd[HPD_NUM_PINS])
> +{
> +       struct drm_i915_private *dev_priv = to_i915(dev);
> +       u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> +
> +       dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> +       I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> +
> +       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> +                          dig_hotplug_reg, hpd,
> +                          pch_port_hotplug_long_detect);
> +
> +       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> +}
> +
>  static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         int pipe;
>         u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
>
> -       if (hotplug_trigger) {
> -               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> -
> -               dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> -               I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> -
> -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                                  dig_hotplug_reg, hpd_ibx,
> -                                  pch_port_hotplug_long_detect);
> -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> -       }
> +       if (hotplug_trigger)
> +               ibx_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx);
>
>         if (pch_iir & SDE_AUDIO_POWER_MASK) {
>                 int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK) >>
> @@ -1851,19 +1858,8 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
>         int pipe;
>         u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
>
> -       if (hotplug_trigger) {
> -               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> -
> -               dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> -               I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
> -
> -               intel_get_hpd_pins(&pin_mask, &long_mask,
> -                                  hotplug_trigger,
> -                                  dig_hotplug_reg, hpd_cpt,
> -                                  pch_port_hotplug_long_detect);
> -
> -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> -       }
> +       if (hotplug_trigger)
> +               ibx_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt);
>
>         if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
>                 int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
> @@ -1931,23 +1927,30 @@ static void spt_irq_handler(struct drm_device *dev, u32 pch_iir)
>                 gmbus_irq_handler(dev);
>  }
>
> +static void ilk_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
> +                               const u32 hpd[HPD_NUM_PINS])
> +{
> +       struct drm_i915_private *dev_priv = to_i915(dev);
> +       u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> +
> +       dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
> +       I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
> +
> +       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> +                          dig_hotplug_reg, hpd,
> +                          ilk_port_hotplug_long_detect);
> +
> +       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> +}
> +
>  static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         enum pipe pipe;
>         u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
>
> -       if (hotplug_trigger) {
> -               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> -
> -               dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
> -               I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
> -
> -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                                  dig_hotplug_reg, hpd_ilk,
> -                                  ilk_port_hotplug_long_detect);
> -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> -       }
> +       if (hotplug_trigger)
> +               ilk_hpd_irq_handler(dev, hotplug_trigger, hpd_ilk);
>
>         if (de_iir & DE_AUX_CHANNEL_A)
>                 dp_aux_irq_handler(dev);
> @@ -1999,17 +2002,8 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
>         enum pipe pipe;
>         u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB;
>
> -       if (hotplug_trigger) {
> -               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> -
> -               dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
> -               I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
> -
> -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                                  dig_hotplug_reg, hpd_ivb,
> -                                  ilk_port_hotplug_long_detect);
> -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> -       }
> +       if (hotplug_trigger)
> +               ilk_hpd_irq_handler(dev, hotplug_trigger, hpd_ivb);
>
>         if (de_iir & DE_ERR_INT_IVB)
>                 ivb_err_int_handler(dev);
> @@ -2122,7 +2116,8 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>         return ret;
>  }
>
> -static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger)
> +static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
> +                               const u32 hpd[HPD_NUM_PINS])
>  {
>         struct drm_i915_private *dev_priv = to_i915(dev);
>         u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> @@ -2131,8 +2126,9 @@ static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger)
>         I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
>
>         intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                          dig_hotplug_reg, hpd_bxt,
> +                          dig_hotplug_reg, hpd,
>                            bxt_port_hotplug_long_detect);
> +
>         intel_hpd_irq_handler(dev, pin_mask, long_mask);
>  }
>
> @@ -2192,26 +2188,16 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
>                         I915_WRITE(GEN8_DE_PORT_IIR, tmp);
>                         ret = IRQ_HANDLED;
>
> -                       if (IS_BROADWELL(dev) && hotplug_trigger) {
> -                               u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
> -
> -                               dig_hotplug_reg = I915_READ(DIGITAL_PORT_HOTPLUG_CNTRL);
> -                               I915_WRITE(DIGITAL_PORT_HOTPLUG_CNTRL, dig_hotplug_reg);
> -
> -                               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                                                  dig_hotplug_reg, hpd_bdw,
> -                                                  ilk_port_hotplug_long_detect);
> -                               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> -                               found = true;
> -                       }
> -
>                         if (tmp & aux_mask) {
>                                 dp_aux_irq_handler(dev);
>                                 found = true;
>                         }
>
> -                       if (IS_BROXTON(dev) && hotplug_trigger) {
> -                               bxt_hpd_irq_handler(dev, hotplug_trigger);
> +                       if (hotplug_trigger) {
> +                               if (IS_BROXTON(dev))
> +                                       bxt_hpd_irq_handler(dev, hotplug_trigger, hpd_bxt);
> +                               else
> +                                       ilk_hpd_irq_handler(dev, hotplug_trigger, hpd_bdw);
>                                 found = true;
>                         }
>
> --
> 2.4.6
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
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Re: [PATCH 16/17] drm/i915: Rewrite BXT HPD code to conform to pre-existing style

[Paulo Zanoni]

2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Rewrite the BXT hpd setup to match the way we do it on other platforms:
> - Throw out BXT_HOTPLUG_CTL since it's the same as PCH_PORT_HOTPLUG
> - Enable the HPD bits in the DE port IER in gen8_de_irq_postinstall()
> - Update DE port IMR using bdw_update_port_irq()
>
> Also throw out port D from bxt_port_hotplug_long_detect() since BXT only
> goes up to C.

Another commit which I would have split into many smaller ones :)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 36 +++++++++++++-----------------------
>  drivers/gpu/drm/i915/i915_reg.h | 15 ---------------
>  2 files changed, 13 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index a7c4efb..1a29dfd 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1300,8 +1300,6 @@ static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
>                 return val & PORTB_HOTPLUG_LONG_DETECT;
>         case PORT_C:
>                 return val & PORTC_HOTPLUG_LONG_DETECT;
> -       case PORT_D:
> -               return val & PORTD_HOTPLUG_LONG_DETECT;
>         default:
>                 return false;
>         }
> @@ -2122,8 +2120,8 @@ static void bxt_hpd_irq_handler(struct drm_device *dev, u32 hotplug_trigger,
>         struct drm_i915_private *dev_priv = to_i915(dev);
>         u32 dig_hotplug_reg, pin_mask = 0, long_mask = 0;
>
> -       dig_hotplug_reg = I915_READ(BXT_HOTPLUG_CTL);
> -       I915_WRITE(BXT_HOTPLUG_CTL, dig_hotplug_reg);
> +       dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
> +       I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
>
>         intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
>                            dig_hotplug_reg, hpd,
> @@ -3241,27 +3239,17 @@ static void ilk_hpd_irq_setup(struct drm_device *dev)
>  static void bxt_hpd_irq_setup(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> -       u32 hotplug_port;
> -       u32 hotplug_ctrl;
> -
> -       hotplug_port = intel_hpd_enabled_irqs(dev, hpd_bxt);
> -
> -       hotplug_ctrl = I915_READ(BXT_HOTPLUG_CTL) & ~BXT_HOTPLUG_CTL_MASK;
> +       u32 hotplug_irqs, hotplug, enabled_irqs;
>
> -       if (hotplug_port & BXT_DE_PORT_HP_DDIA)
> -               hotplug_ctrl |= BXT_DDIA_HPD_ENABLE;
> -       if (hotplug_port & BXT_DE_PORT_HP_DDIB)
> -               hotplug_ctrl |= BXT_DDIB_HPD_ENABLE;
> -       if (hotplug_port & BXT_DE_PORT_HP_DDIC)
> -               hotplug_ctrl |= BXT_DDIC_HPD_ENABLE;
> -       I915_WRITE(BXT_HOTPLUG_CTL, hotplug_ctrl);
> +       enabled_irqs = intel_hpd_enabled_irqs(dev, hpd_bxt);
> +       hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK;
>
> -       hotplug_ctrl = I915_READ(GEN8_DE_PORT_IMR) & ~hotplug_port;
> -       I915_WRITE(GEN8_DE_PORT_IMR, hotplug_ctrl);
> +       bdw_update_port_irq(dev_priv, hotplug_irqs, enabled_irqs);
>
> -       hotplug_ctrl = I915_READ(GEN8_DE_PORT_IER) | hotplug_port;
> -       I915_WRITE(GEN8_DE_PORT_IER, hotplug_ctrl);
> -       POSTING_READ(GEN8_DE_PORT_IER);
> +       hotplug = I915_READ(PCH_PORT_HOTPLUG);
> +       hotplug |= PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |
> +               PORTA_HOTPLUG_ENABLE;
> +       I915_WRITE(PCH_PORT_HOTPLUG, hotplug);
>  }
>
>  static void ibx_irq_postinstall(struct drm_device *dev)
> @@ -3555,7 +3543,9 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>                                            GEN8_PIPE_FIFO_UNDERRUN;
>
>         de_port_enables = de_port_masked;
> -       if (IS_BROADWELL(dev_priv))
> +       if (IS_BROXTON(dev_priv))
> +               de_port_enables |= BXT_DE_PORT_HOTPLUG_MASK;
> +       else if (IS_BROADWELL(dev_priv))
>                 de_port_enables |= GEN8_PORT_DP_A_HOTPLUG;
>
>         dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 0fc8888..8abae83 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5787,21 +5787,6 @@ enum skl_disp_power_wells {
>  #define GEN8_PCU_IIR 0x444e8
>  #define GEN8_PCU_IER 0x444ec
>
> -/* BXT hotplug control */
> -#define BXT_HOTPLUG_CTL                        0xC4030
> -#define   BXT_DDIA_HPD_ENABLE          (1 << 28)
> -#define   BXT_DDIA_HPD_STATUS          (3 << 24)
> -#define   BXT_DDIC_HPD_ENABLE          (1 << 12)
> -#define   BXT_DDIC_HPD_STATUS          (3 << 8)
> -#define   BXT_DDIB_HPD_ENABLE          (1 << 4)
> -#define   BXT_DDIB_HPD_STATUS          (3 << 0)
> -#define   BXT_HOTPLUG_CTL_MASK         (BXT_DDIA_HPD_ENABLE | \
> -                                        BXT_DDIB_HPD_ENABLE | \
> -                                        BXT_DDIC_HPD_ENABLE)
> -#define   BXT_HPD_STATUS_MASK          (BXT_DDIA_HPD_STATUS | \
> -                                        BXT_DDIB_HPD_STATUS | \
> -                                        BXT_DDIC_HPD_STATUS)
> -
>  #define ILK_DISPLAY_CHICKEN2   0x42004
>  /* Required on all Ironlake and Sandybridge according to the B-Spec. */
>  #define  ILK_ELPIN_409_SELECT  (1 << 25)
> --
> 2.4.6
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
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Re: [PATCH 17/17] drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x

[Paulo Zanoni]

2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Pass the correct hpd[] array to intel_get_hpd_pins() on pre-g4x
> platforms.
>
> This got broken in the following commit:
> commit fd63e2a972c670887e5e8a08440111d3812c0996
> Author: Imre Deak <imre.deak@intel.com>
> Date:   Tue Jul 21 15:32:44 2015 -0700
>
>     drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins

The good & old "copy, paste, then adjust only one of the two variable
names" error.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 1a29dfd..9866739 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1644,7 +1644,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
>                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
>
>                 intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                                  hotplug_trigger, hpd_status_g4x,
> +                                  hotplug_trigger, hpd_status_i915,
>                                    i9xx_port_hotplug_long_detect);
>                 intel_hpd_irq_handler(dev, pin_mask, long_mask);
>         }
> --
> 2.4.6
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



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Re: [PATCH 18/17] drm/i915: Don't call intel_get_hpd_pins() when there's no hotplug interrupt

[Paulo Zanoni]

2015-08-28 16:59 GMT-03:00  <ville.syrjala@linux.intel.com>:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On GMCH plaforms we are now getting the following spew on aux
> interrupts:
> [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
>
> Prevent it by not calling intel_get_hpd_pins() unless one of the HPD
> interrupt bits are actually set.
>
> I already fixed similar annoyance once with
> 4bca26d0a6518d51a9abe64fbde4b12f04c74053 drm/i915: Use HOTPLUG_INT_STATUS_G4X on VLV/CHV
>
> but another source for it got added in
> fd63e2a972c670887e5e8a08440111d3812c0996 drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins
>
> due to pch_get_hpd_pins() being chosen over i9xx_get_hpd_pins() to
> serve as the new unified piece of code. pch_get_hpd_pins() had the debug
> print, and i9xx_get_hpd_pins() didn't.
>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 22 ++++++++++++++--------
>  1 file changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 610d301..07e539d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1639,20 +1639,26 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
>         if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
>                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
>
> -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                                  hotplug_trigger, hpd_status_g4x,
> -                                  i9xx_port_hotplug_long_detect);
> -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> +               if (hotplug_trigger) {
> +                       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> +                                          hotplug_trigger, hpd_status_g4x,
> +                                          i9xx_port_hotplug_long_detect);
> +
> +                       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> +               }
>
>                 if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
>                         dp_aux_irq_handler(dev);
>         } else {
>                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
>
> -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> -                                  hotplug_trigger, hpd_status_i915,
> -                                  i9xx_port_hotplug_long_detect);
> -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> +               if (hotplug_trigger) {
> +                       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> +                                          hotplug_trigger, hpd_status_i915,
> +                                          i9xx_port_hotplug_long_detect);
> +
> +                       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> +               }
>         }
>  }
>
> --
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
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Re: [PATCH 17/17] drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x

[shuang.he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 7281
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                                  253/253              253/253
SNB                                  248/248              248/248
IVB                                  281/281              281/281
BYT                 -1              234/234              233/234
HSW                                  317/317              317/317
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*BYT  igt@gem_tiled_partial_pwrite_pread@reads      PASS(1)      FAIL(1)
Note: You need to pay more attention to line start with '*'
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Re: [PATCH 17/17] drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x

[Jani Nikula]

On Sat, 29 Aug 2015, Paulo Zanoni <przanoni@gmail.com> wrote:
> 2015-08-27 17:56 GMT-03:00  <ville.syrjala@linux.intel.com>:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Pass the correct hpd[] array to intel_get_hpd_pins() on pre-g4x
>> platforms.
>>
>> This got broken in the following commit:
>> commit fd63e2a972c670887e5e8a08440111d3812c0996
>> Author: Imre Deak <imre.deak@intel.com>
>> Date:   Tue Jul 21 15:32:44 2015 -0700
>>
>>     drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins
>
> The good & old "copy, paste, then adjust only one of the two variable
> names" error.
>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Pushed this one patch to drm-intel-next-fixes, thanks for the patch and
review.

I took the liberty of adding Reviewed-by also from Egbert and Daniel, as
Egbert submitted an identical patch [1] which Daniel reviewed. Patch
selection was purely on a first come first applied basis.

BR,
Jani.

[1] http://mid.gmane.org/1441138895-23732-4-git-send-email-eich@suse.de


>
>>
>> Cc: Imre Deak <imre.deak@intel.com>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_irq.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index 1a29dfd..9866739 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -1644,7 +1644,7 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
>>                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
>>
>>                 intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
>> -                                  hotplug_trigger, hpd_status_g4x,
>> +                                  hotplug_trigger, hpd_status_i915,
>>                                    i9xx_port_hotplug_long_detect);
>>                 intel_hpd_irq_handler(dev, pin_mask, long_mask);
>>         }
>> --
>> 2.4.6
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> -- 
> Paulo Zanoni
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Re: [PATCH 18/17] drm/i915: Don't call intel_get_hpd_pins() when there's no hotplug interrupt

[Daniel Vetter]

On Fri, Aug 28, 2015 at 07:15:15PM -0300, Paulo Zanoni wrote:
> 2015-08-28 16:59 GMT-03:00  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > On GMCH plaforms we are now getting the following spew on aux
> > interrupts:
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_get_hpd_pins] hotplug event received, stat 0x00000000, dig 0x00000000, pins 0x00000000
> > [drm:intel_dp_aux_ch] dp_aux_ch timeout status 0x71450064
> >
> > Prevent it by not calling intel_get_hpd_pins() unless one of the HPD
> > interrupt bits are actually set.
> >
> > I already fixed similar annoyance once with
> > 4bca26d0a6518d51a9abe64fbde4b12f04c74053 drm/i915: Use HOTPLUG_INT_STATUS_G4X on VLV/CHV
> >
> > but another source for it got added in
> > fd63e2a972c670887e5e8a08440111d3812c0996 drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins
> >
> > due to pch_get_hpd_pins() being chosen over i9xx_get_hpd_pins() to
> > serve as the new unified piece of code. pch_get_hpd_pins() had the debug
> > print, and i9xx_get_hpd_pins() didn't.
> >
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

All applied to dinq except for one patch that Jani picked up to -fixes.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c | 22 ++++++++++++++--------
> >  1 file changed, 14 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 610d301..07e539d 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1639,20 +1639,26 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
> >         if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
> >                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
> >
> > -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > -                                  hotplug_trigger, hpd_status_g4x,
> > -                                  i9xx_port_hotplug_long_detect);
> > -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               if (hotplug_trigger) {
> > +                       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > +                                          hotplug_trigger, hpd_status_g4x,
> > +                                          i9xx_port_hotplug_long_detect);
> > +
> > +                       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               }
> >
> >                 if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
> >                         dp_aux_irq_handler(dev);
> >         } else {
> >                 u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
> >
> > -               intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > -                                  hotplug_trigger, hpd_status_i915,
> > -                                  i9xx_port_hotplug_long_detect);
> > -               intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               if (hotplug_trigger) {
> > +                       intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
> > +                                          hotplug_trigger, hpd_status_i915,
> > +                                          i9xx_port_hotplug_long_detect);
> > +
> > +                       intel_hpd_irq_handler(dev, pin_mask, long_mask);
> > +               }
> >         }
> >  }
> >
> > --
> > 2.4.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni
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-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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