From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: access the PP_ON_DELAYS/PP_OFF_DELAYS regs only pre GEN5 Date: Wed, 2 Sep 2015 20:50:05 +0300 Message-ID: <20150902175005.GQ29811@intel.com> References: <1441208195-15758-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 694606E43F for ; Wed, 2 Sep 2015 10:51:35 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1441208195-15758-1-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gV2VkLCBTZXAgMDIsIDIwMTUgYXQgMDY6MzY6MzVQTSArMDMwMCwgSW1yZSBEZWFrIHdyb3Rl Ogo+IFRoZXNlIHJlZ2lzdGVycyBleGlzdCBvbmx5IGJlZm9yZSBHRU41LCBzbyBjdXJyZW50bHkg d2UgbWF5IGFjY2Vzcwo+IHVuZGVmaW5lZCByZWdpc3RlcnMgb24gVkxWL0NIViBhbmQgQlhULiBB cHBseSB0aGUgd29ya2Fyb3VuZCBvbmx5IHByZQo+IEdFTjUuCj4gCj4gVGhpcyB0cmlnZ2VyZWQg YW4gdW5jbGFpbWVkIHJlZ2lzdGVyIGFjY2VzcyB3YXJuaW5nIG9uIEJYVC4KPiAKPiBTaWduZWQt b2ZmLWJ5OiBJbXJlIERlYWsgPGltcmUuZGVha0BpbnRlbC5jb20+Cj4gLS0tCj4gIGRyaXZlcnMv Z3B1L2RybS9pOTE1L2ludGVsX2Jpb3MuYyB8IDIgKy0KPiAgMSBmaWxlIGNoYW5nZWQsIDEgaW5z ZXJ0aW9uKCspLCAxIGRlbGV0aW9uKC0pCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2ludGVsX2Jpb3MuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Jpb3MuYwo+ IGluZGV4IGIzZTQzN2IuLjg5NjlmZTYgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5 MTUvaW50ZWxfYmlvcy5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfYmlvcy5j Cj4gQEAgLTEzNDksNyArMTM0OSw3IEBAIHZvaWQgaW50ZWxfc2V0dXBfYmlvcyhzdHJ1Y3QgZHJt X2RldmljZSAqZGV2KQo+ICAJc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRldl9wcml2ID0gZGV2 LT5kZXZfcHJpdmF0ZTsKPiAgCj4gIAkgLyogU2V0IHRoZSBQYW5lbCBQb3dlciBPbi9PZmYgdGlt aW5ncyBpZiB1bmluaXRpYWxpemVkLiAqLwo+IC0JaWYgKCFIQVNfUENIX1NQTElUKGRldikgJiYK PiArCWlmIChJTlRFTF9JTkZPKGRldl9wcml2KS0+Z2VuIDwgNSAmJgo+ICAJICAgIEk5MTVfUkVB RChQUF9PTl9ERUxBWVMpID09IDAgJiYgSTkxNV9SRUFEKFBQX09GRl9ERUxBWVMpID09IDApIHsK PiAgCQkvKiBTZXQgVDIgdG8gNDBtcyBhbmQgVDUgdG8gMjAwbXMgKi8KPiAgCQlJOTE1X1dSSVRF KFBQX09OX0RFTEFZUywgMHgwMTkwMDdkMCk7CgpXaGF0IGEgbmFzdHkgcGxhY2UgdG8gaGlkZSBp dC4gQ291bGQgeW91IG1vdmUgdGhpcyBzb21ld2hlcmUgaW50byB0aGUKTFZEUyBpbml0IGNvZGUg c28gdGhhdCBpdCdzIGxlc3Mgd2VsbCBoaWRkZW4/IEFuZCBtYXliZSB0b3NzIGluIGEgZGVidWcK bWVzc2FnZSBpbmRpY2F0aW5nIHdlIGhhZCB0byBwdWxsIHRoZSBwYW5lbCBkZWxheXMgZnJvbSB0 aGluIGFpci4KCi0tIApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50 ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3Jn L21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==