Re: [PATCH v2 2/2] drm/i915: access the PP_ON_DELAYS/PP_OFF_DELAYS regs only pre GEN5

[Daniel Vetter <daniel@ffwll.ch>]

On Thu, Sep 03, 2015 at 04:41:59PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 03, 2015 at 04:24:36PM +0300, Imre Deak wrote:
> > These registers exist only before GEN5, so currently we may access
> > undefined registers on VLV/CHV and BXT. Apply the workaround only pre
> > GEN5.
> > 
> > Since the workaround is relevant only when LVDS is present, for clarity
> > apply it only if this is the case.
> > 
> > This triggered an unclaimed register access warning on BXT.
> > 
> > v2: (Ville)
> > - move the workaround to the LVDS init code
> > - print a debug note about the workaround
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Both patches applied to dinq, thanks.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/i915_dma.c   |  2 --
> >  drivers/gpu/drm/i915/intel_bios.c | 18 ------------------
> >  drivers/gpu/drm/i915/intel_bios.h |  1 -
> >  drivers/gpu/drm/i915/intel_lvds.c | 12 ++++++++++++
> >  4 files changed, 12 insertions(+), 21 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> > index f0eaa6f..066a0ef 100644
> > --- a/drivers/gpu/drm/i915/i915_dma.c
> > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > @@ -997,8 +997,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
> >  	intel_setup_gmbus(dev);
> >  	intel_opregion_setup(dev);
> >  
> > -	intel_setup_bios(dev);
> > -
> >  	i915_gem_load(dev);
> >  
> >  	/* On the 945G/GM, the chipset reports the MSI capability on the
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> > index b3e437b..c8acc29 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -1340,21 +1340,3 @@ intel_parse_bios(struct drm_device *dev)
> >  
> >  	return 0;
> >  }
> > -
> > -/* Ensure that vital registers have been initialised, even if the BIOS
> > - * is absent or just failing to do its job.
> > - */
> > -void intel_setup_bios(struct drm_device *dev)
> > -{
> > -	struct drm_i915_private *dev_priv = dev->dev_private;
> > -
> > -	 /* Set the Panel Power On/Off timings if uninitialized. */
> > -	if (!HAS_PCH_SPLIT(dev) &&
> > -	    I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
> > -		/* Set T2 to 40ms and T5 to 200ms */
> > -		I915_WRITE(PP_ON_DELAYS, 0x019007d0);
> > -
> > -		/* Set T3 to 35ms and Tx to 200ms */
> > -		I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
> > -	}
> > -}
> > diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
> > index 46cd5c7..1b7417e 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.h
> > +++ b/drivers/gpu/drm/i915/intel_bios.h
> > @@ -588,7 +588,6 @@ struct bdb_psr {
> >  	struct psr_table psr_table[16];
> >  } __packed;
> >  
> > -void intel_setup_bios(struct drm_device *dev);
> >  int intel_parse_bios(struct drm_device *dev);
> >  
> >  /*
> > diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> > index a16308a..2c2d1f0 100644
> > --- a/drivers/gpu/drm/i915/intel_lvds.c
> > +++ b/drivers/gpu/drm/i915/intel_lvds.c
> > @@ -985,6 +985,18 @@ void intel_lvds_init(struct drm_device *dev)
> >  		DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
> >  	}
> >  
> > +	 /* Set the Panel Power On/Off timings if uninitialized. */
> > +	if (INTEL_INFO(dev_priv)->gen < 5 &&
> > +	    I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
> > +		/* Set T2 to 40ms and T5 to 200ms */
> > +		I915_WRITE(PP_ON_DELAYS, 0x019007d0);
> > +
> > +		/* Set T3 to 35ms and Tx to 200ms */
> > +		I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
> > +
> > +		DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
> > +	}
> > +
> >  	lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
> >  	if (!lvds_encoder)
> >  		return;
> > -- 
> > 2.1.4
> 
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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