Re: [PATCH 4/4] drm/i915/bxt: Clean up bxt_init_clock_gating

[Daniel Vetter <daniel@ffwll.ch>]

On Mon, Sep 07, 2015 at 02:55:08PM +0100, Nick Hoath wrote:
> On 29/06/2015 15:29, Mika Kuoppala wrote:
> >Nick Hoath <nicholas.hoath@intel.com> writes:
> >
> >>Add stepping check for A0 workarounds, and remove the associated
> >>FIXME tags.
> >>Split out unrelated WAs for later condition checking.
> >>
> >>v2: Fixed format (PeterL)
> >>v3: Corrected stepping check for WaDisableSDEUnitClockGating
> >>     - Ignoring comment, following hardware spec instead. (ChrisH)
> >>     Added description for TILECTL setting (JonB)
> >>
> >>Cc: Peter Lawthers <peter.lawthers@intel.com>
> >>Cc: Chris Harris <chris.harris@intel.com>
> >>Cc: Jon Bloomfield <jon.bloomfield@intel.com>
> >>Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
> >>---
> >>  drivers/gpu/drm/i915/intel_pm.c | 16 +++++++++++-----
> >>  1 file changed, 11 insertions(+), 5 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> >>index 26ef146..86a4ced 100644
> >>--- a/drivers/gpu/drm/i915/intel_pm.c
> >>+++ b/drivers/gpu/drm/i915/intel_pm.c
> >>@@ -115,18 +115,24 @@ static void bxt_init_clock_gating(struct drm_device *dev)
> >>
> >>  	gen9_init_clock_gating(dev);
> >>
> >>+	/* WaDisableSDEUnitClockGating:bxt */
> >>+	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> >>+		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> >>+
> >>  	/*
> >>  	 * FIXME:
> >>-	 * GEN8_SDEUNIT_CLOCK_GATE_DISABLE applies on A0 only.
> >>  	 * GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only.
> >>  	 */
> >>-	 /* WaDisableSDEUnitClockGating:bxt */
> >>  	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> >>-		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE |
> >>  		   GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
> >>
> >
> >I guess you decided not to combine the writes due to FIXME.
> >
> >Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> 
> Looks like this one has fallen through the cracks & not been merged...

Thanks for the ping, applied to dinq.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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