From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Konduru, Chandra" <chandra.konduru@intel.com>
Cc: "Vetter, Daniel" <daniel.vetter@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Syrjala, Ville" <ville.syrjala@intel.com>
Subject: Re: [PATCH 11/15] drm/i915: Add NV12 to primary plane programming.
Date: Thu, 10 Sep 2015 01:27:36 +0300 [thread overview]
Message-ID: <20150909222736.GA29811@intel.com> (raw)
In-Reply-To: <76A9B330A4D78C4D99CB292C4CC06C0E370D2A0F@fmsmsx101.amr.corp.intel.com>
On Wed, Sep 09, 2015 at 09:09:27PM +0000, Konduru, Chandra wrote:
>
> > > > > > > > > > > + /* For tile-Yf, uv-subplane tile width is
> > 2x of Y-
> > > > > > subplane
> > > > > > > > > > */
> > > > > > > > > > > + aux_stride = fb->modifier[0] ==
> > > > > > > > > > I915_FORMAT_MOD_Yf_TILED ?
> > > > > > > > > > > + stride / 2 : stride;
> > > > > > > > > >
> > > > > > > > > > The 2x part was rather well hidden in the spec. How do we deal
> > with
> > > > > > > > > > cases when the Y stride is an odd number of tiles?
> > > > > > > > >
> > > > > > > > > It should be a round up division to take care of that scenario.
> > > > > > > >
> > > > > > > > That would stil lresult in a corrupted picture I think. So I was
> > > > > > > > thinking that we should just refuse to create NCV12 framebuffers
> > with a
> > > > > > > > poorly aligned stride.
> > > > > > > >
> > > > > > > I added a check in intel_framebuffer_init() which should catch them:
> > > > > > > if (mode_cmd->pitches[0] != mode_cmd->pitches[1]) {
> > > > > > > DRM_DEBUG("y and uv subplanes have different pitches\n");
> > > > > > > return -EINVAL;
> > > > > > > }
> > > > > >
> > > > > > That won't catch the case I'm worried about. We would also need to
> > make
> > > > > > sure pitches[1] is aligned to the UV tile width.
> > > > >
> > > > > If caller is following tile/row/pitch alignments properly for sub-planes of
> > > > > NV12 Yf buffer, above check will catch.
> > > > > But are you referring a case where userland isn't following tile/row size
> > > > > alignments properly? In that case, above may not catch. But
> > > > > isn't that is the case even with other FB formats if user land not
> > > > > following tile/row/pitch alignments?
> > > >
> > > > We reject any attempt to create a framebuffer with a poorly aligned
> > > > stride.
> > > >
> > > > Hmm. Actually I suppose we should just handle it in
> > > > intel_fb_stride_alignment(). Eg.:
> > > >
> > > > case Yf:
> > > > if (cpp != 1 || pixel_format == DRM_FORMAT_NV12)
> > > > return 128;
> > > > else
> > > > return 64;
> > >
> > > This check is already there in intel_fb_stride_alignment()
> > > which is called from intel_framebuffer_init(). But it always
> > > does for 1st sub-plane which means does for Y.
> > > It needs an update to pass a sub-plane (for UV) parameter,
> > > and made another call for UV-plane alignment check.
> > > Will this be ok?
> >
> > Yeah. You could in fact just have it loop over all the planes
> > and call it for each. Something like this perhaps:
> > for (i = 0; i < drm_format_num_planes(formt); i++) {
> > intel_fb_stride_alignment(modifier[i], format, i);
> > ...
> > }
> I planned the same, looping for all subplanes.
>
> >
> > Or you could pass the cpp/bits_per_pixel instead of the plane index,
> > since that's the only thing for which you need the plane index within
> > the function.
> >
> > I also started to wonder whether we should repeat most of the other
> > checks in intel_framebuffer_init() for each plane. But it's probably
> > just easier to check that handle, pitch and modifier matches for
> > both planes in the NV12 case. I think you actually missed the
> > modifier check. You just checked that modifier[1] is Yf, but that
> > leaves modifier[0] unchecked. I failed to notice it as well during
> > my review of the relevant patch.
>
> Added modifier check.
> Made these changes to " drm/i915: Add NV12 support to intel_framebuffer_init"
> patch. Also sending out updated WA patch to move to init clockgating.
> Rest of your feedback is already addressed.
> Before sending out these 2 patches, any other comments?
Looking at what was said, I think we covered most open items
reasonably well, so fire away. I'll start going through the
updated patches tomorrow.
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-09-09 22:27 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-20 1:02 [PATCH 00/15] drm/i915: Adding NV12 for skylake display Chandra Konduru
2015-08-20 1:02 ` [PATCH 01/15] drm/i915: Allocate min dbuf blocks per bspec Chandra Konduru
2015-09-04 8:17 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 02/15] drm/i915: In DBUF/WM calcs for 90/270, swap w & h Chandra Konduru
2015-09-04 8:31 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 03/15] drm/i915: Add register definitions for NV12 support Chandra Konduru
2015-09-04 8:40 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 04/15] drm/i915: Set scaler mode for NV12 Chandra Konduru
2015-09-04 8:53 ` Ville Syrjälä
2015-09-04 15:03 ` Daniel Vetter
2015-08-20 1:02 ` [PATCH 05/15] drm/i915: Stage scaler request for NV12 as src format Chandra Konduru
2015-09-04 10:17 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 06/15] drm/i915: Update format_is_yuv() to include NV12 Chandra Konduru
2015-09-04 10:17 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 07/15] drm/i915: Upscale scaler max scale for NV12 Chandra Konduru
2015-09-04 10:22 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 08/15] drm/i915: Add NV12 as supported format for primary plane Chandra Konduru
2015-08-26 8:40 ` Daniel Vetter
2015-08-27 1:40 ` Konduru, Chandra
2015-08-20 1:02 ` [PATCH 09/15] drm/i915: Add NV12 as supported format for sprite plane Chandra Konduru
2015-09-04 10:28 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 10/15] drm/i915: Add NV12 support to intel_framebuffer_init Chandra Konduru
2015-09-04 10:40 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 11/15] drm/i915: Add NV12 to primary plane programming Chandra Konduru
2015-09-04 11:09 ` Ville Syrjälä
2015-09-04 15:06 ` Daniel Vetter
2015-09-05 1:10 ` Konduru, Chandra
2015-09-05 14:59 ` Ville Syrjälä
2015-09-08 23:30 ` Konduru, Chandra
2015-09-09 11:41 ` Ville Syrjälä
2015-09-09 17:12 ` Konduru, Chandra
2015-09-09 18:05 ` Ville Syrjälä
2015-09-09 20:10 ` Konduru, Chandra
2015-09-09 20:40 ` Ville Syrjälä
2015-09-09 21:09 ` Konduru, Chandra
2015-09-09 22:27 ` Ville Syrjälä [this message]
2015-09-09 23:31 ` Konduru, Chandra
2015-08-20 1:02 ` [PATCH 12/15] drm/i915: Add NV12 to sprite " Chandra Konduru
2015-08-20 1:02 ` [PATCH 13/15] drm/i915: Set initial phase & trip for NV12 scaler Chandra Konduru
2015-09-04 11:15 ` Ville Syrjälä
2015-08-20 1:02 ` [PATCH 14/15] drm/i915: skl nv12 workarounds Chandra Konduru
2015-08-26 8:42 ` Daniel Vetter
2015-08-27 1:44 ` Konduru, Chandra
2015-09-02 8:02 ` Daniel Vetter
2015-09-03 18:33 ` Konduru, Chandra
2015-09-04 7:40 ` Daniel Vetter
2015-09-05 2:09 ` Konduru, Chandra
2015-09-04 11:26 ` Ville Syrjälä
2015-09-05 1:28 ` Konduru, Chandra
2015-09-05 14:52 ` Ville Syrjälä
2015-09-08 23:51 ` Konduru, Chandra
2015-09-09 11:46 ` Ville Syrjälä
2015-09-09 17:20 ` Konduru, Chandra
2015-08-20 1:02 ` [PATCH 15/15] drm/i915: Add 90/270 rotation for NV12 format Chandra Konduru
2015-09-04 11:30 ` Ville Syrjälä
2015-09-05 1:38 ` Konduru, Chandra
2015-09-05 14:48 ` Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150909222736.GA29811@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=chandra.konduru@intel.com \
--cc=daniel.vetter@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).