Re: [PATCH 01/15] drm/i915: Allocate min dbuf blocks per bspec

Daniel Vetter
2015-09-30T12:17:26Z

On Tue, Sep 29, 2015 at 08:45:05PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 04, 2015 at 07:32:57PM -0700, Chandra Konduru wrote:
> > Properly allocate min blocks per hw requirements.
> >
> > v2:
> > - changed helper functional param to bool, some code simplification (Ville)
> >
> > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
>
> IIRC I gave my r-b alrady?

Yup, it was a conditional r-b ("fix this tiny thing and you have the r-b")
somewhen in August.

Chandra in that case please add the r-b yourself to avoid wasting people's
time. Also, not doing that just increases the changes that someone will
spot something new ;-)
-Daniel

>
> But I'll toss it in again:
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 29 +++++++++++++++++++++++++++--
> > 1 file changed, 27 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index fff0c22..4d3aca0 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2959,6 +2959,31 @@ skl_get_total_relative_data_rate(struct intel_crtc *intel_crtc,
> > return total_data_rate;
> > }
> >
> > +static uint16_t
> > +skl_dbuf_min_alloc(const struct intel_plane_wm_parameters *p, bool y_plane)
> > +{
> > + uint16_t min_alloc;
> > +
> > + /* For packed formats, no y-plane, return 0 */
> > + if (y_plane && !p->y_bytes_per_pixel)
> > + return 0;
> > +
> > + if (p->tiling == I915_FORMAT_MOD_Y_TILED ||
> > + p->tiling == I915_FORMAT_MOD_Yf_TILED) {
> > + uint32_t min_scanlines = 8;
> > + uint8_t bytes_per_pixel =
> > + y_plane ? p->y_bytes_per_pixel : p->bytes_per_pixel;
> > +
> > + min_scanlines = 32 / bytes_per_pixel;
> > + min_alloc = DIV_ROUND_UP((4 * p->horiz_pixels/(y_plane ? 1 : 2) *
> > + bytes_per_pixel), 512) * min_scanlines/4 + 3;
> > + } else {
> > + min_alloc = 8;
> > + }
> > +
> > + return min_alloc;
> > +}
> > +
> > static void
> > skl_allocate_pipe_ddb(struct drm_crtc *crtc,
> > const struct intel_wm_config *config,
> > @@ -2999,9 +3024,9 @@ skl_allocate_pipe_ddb(struct drm_crtc *crtc,
> > if (!p->enabled)
> > continue;
> >
> > - minimum[plane] = 8;
> > + minimum[plane] = skl_dbuf_min_alloc(p, false); /* uv-plane/packed */
> > alloc_size -= minimum[plane];
> > - y_minimum[plane] = p->y_bytes_per_pixel ? 8 : 0;
> > + y_minimum[plane] = skl_dbuf_min_alloc(p, true); /* y-plane */
> > alloc_size -= y_minimum[plane];
> > }
> >
> > --
> > 1.7.9.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

--
Daniel Vetter
Software Engineer, Intel Corporation