From: Daniel Vetter <daniel@ffwll.ch>
To: Yu Dai <yu.dai@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/5] drm/i915: WaRsDisableCoarsePowerGating
Date: Wed, 23 Sep 2015 09:47:05 +0200 [thread overview]
Message-ID: <20150923074705.GE3383@phenom.ffwll.local> (raw)
In-Reply-To: <560033C5.4090902@intel.com>
On Mon, Sep 21, 2015 at 09:43:49AM -0700, Yu Dai wrote:
>
>
> On 08/23/2015 05:22 AM, Sagar Arun Kamble wrote:
> >WaRsDisableCoarsePowerGating: Coarse Power Gating (CPG) needs to be
> >disabled for platforms prior to BXT B0 and till SKL E0.
> >
> >Change-Id: Ia3c4c16e050c88d3e259f601054875c812d69c3a
> >Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> >---
> > drivers/gpu/drm/i915/intel_pm.c | 11 +++++++----
> > 1 file changed, 7 insertions(+), 4 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> >index 75f1c8c..c0345d2 100644
> >--- a/drivers/gpu/drm/i915/intel_pm.c
> >+++ b/drivers/gpu/drm/i915/intel_pm.c
> >@@ -4840,11 +4840,14 @@ static void gen9_enable_rc6(struct drm_device *dev)
> > /*
> > * 3b: Enable Coarse Power Gating only when RC6 is enabled.
> >- * WaDisableRenderPowerGating:skl,bxt - Render PG need to be disabled with RC6.
> >+ * WaRsDisableCoarsePowerGating:skl,bxt - Render/Media PG need to be disabled with RC6.
> > */
> >- I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
> >- GEN9_MEDIA_PG_ENABLE : 0);
> >-
> >+ if ((IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) ||
> >+ (IS_SKYLAKE(dev) && (INTEL_REVID(dev) <= SKL_REVID_E0)))
> >+ I915_WRITE(GEN9_PG_ENABLE, 0);
> >+ else
> >+ I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
> >+ (GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE) : 0);
> > intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
>
> Reviewed by: Alex Dai <yu.dai@intel.com>.
You reviewed an old version of this patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-09-23 7:44 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-23 12:22 [PATCH 0/5] RC6/Forcewake/Turbo related changes for Gen9 Sagar Arun Kamble
2015-08-23 12:22 ` [PATCH 1/5] drm/i915: Increase maximum polling time to 50ms for forcewake request/clear ack Sagar Arun Kamble
2015-08-26 9:26 ` Daniel Vetter
2015-09-22 9:06 ` Tvrtko Ursulin
2015-09-22 9:15 ` Chris Wilson
2015-09-22 9:48 ` Tvrtko Ursulin
2015-09-21 16:43 ` Yu Dai
2015-09-23 8:04 ` Daniel Vetter
2015-08-23 12:22 ` [PATCH 2/5] drm/i915/bxt: WaGsvDisableTurbo Sagar Arun Kamble
2015-09-11 6:23 ` Kamble, Sagar A
2015-09-11 12:24 ` Kamble, Sagar A
2015-09-21 16:43 ` Yu Dai
2015-09-23 7:46 ` Daniel Vetter
2015-08-23 12:22 ` [PATCH 3/5] drm/i915: WaRsDisableCoarsePowerGating Sagar Arun Kamble
2015-09-11 6:22 ` Kamble, Sagar A
2015-09-11 9:11 ` [PATCH 1/2] drm/i915: Add IS_SKL_GT3 and IS_SKL_GT4 macro Sagar Arun Kamble
2015-09-11 9:11 ` [PATCH 2/2] drm/i915: WaRsDisableCoarsePowerGating Sagar Arun Kamble
2015-09-11 11:46 ` [PATCH v2 1/1] " Sagar Arun Kamble
2015-09-21 16:43 ` [PATCH 3/5] " Yu Dai
2015-09-23 7:47 ` Daniel Vetter [this message]
2015-08-23 12:22 ` [PATCH 4/5] drm/i915: Use only blitter forcewake Sagar Arun Kamble
2015-08-23 12:30 ` Chris Wilson
2015-09-11 13:23 ` Kamble, Sagar A
2015-09-11 13:37 ` Ville Syrjälä
2015-09-11 13:54 ` Kamble, Sagar A
2015-09-11 14:02 ` Ville Syrjälä
2015-09-12 18:15 ` Kamble, Sagar A
2015-08-23 12:22 ` [PATCH 5/5] drm/i915: Notify Coarse Power Gating changes to GuC Sagar Arun Kamble
2015-08-27 19:55 ` O'Rourke, Tom
2015-09-11 6:16 ` Kamble, Sagar A
2015-09-11 17:17 ` Yu Dai
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