Re: [1/7] drm/i915: Remove duplicated dpcd write on hsw_psr_enable_sink.

[Brian Norris <briannorris@chromium.org>]

On Thu, Aug 20, 2015 at 05:55:38PM -0700, Rodrigo Vivi wrote:
> This is wrong since my commit (89251b17). The intention of that
> commit was to remove this one here that is also wrong anyway,
> but it was forgotten.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Tested-by: Brian Norris <briannorris@chromium.org>

(caveat below)

I was just debugging some PSR issues on Broadwell and ran across your
commit 89251b17. I was also left wondering:
(1) why the duplicate DPCD write to DP_PSR_EN_CFG and
(2) why the '& ~DP_PSR_MAIN_LINK_ACTIVE' mask

Anyway, I was going to send a similar patch soon :)

*** Testing caveat: ***

PSR is still broken on my Broadwell system as of commit 3301d4092106
("drm/i915: PSR: Fix DP_PSR_NO_TRAIN_ON_EXIT logic"). I've done a
partial revert of this commit (but made sure I avoid link standby, as
commit 89251b177b58 ("drm/i915: PSR: deprecate link_standby support for
core platforms.") rightly argues).

But I'll send a proper mail for this issue separately, rather than
carrying on about it here on an unrelated patch.

*** End caveat ***

Regards,
Brian

> ---
> drivers/gpu/drm/i915/intel_psr.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index a04b4dc..51f0514 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -170,9 +170,6 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
>  
>  	aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, 0);
>  
> -	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
> -			   DP_PSR_ENABLE & ~DP_PSR_MAIN_LINK_ACTIVE);
> -
>  	/* Enable AUX frame sync at sink */
>  	if (dev_priv->psr.aux_frame_sync)
>  		drm_dp_dpcd_writeb(&intel_dp->aux,
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