public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 40/43] drm/i915: Store aux data reg offsets in	intel_dp->aux_ch_data_reg[]
Date: Mon, 28 Sep 2015 17:36:47 +0300	[thread overview]
Message-ID: <20150928143647.GQ26517@intel.com> (raw)
In-Reply-To: <87oagmk9st.fsf@intel.com>

On Mon, Sep 28, 2015 at 03:28:18PM +0300, Jani Nikula wrote:
> On Fri, 18 Sep 2015, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Rather than computing on demand, store also the aux data reg
> > offsets under intel_dp.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c  | 49 +++++++++++++++++++++++++++-------------
> >  drivers/gpu/drm/i915/intel_drv.h |  1 +
> >  2 files changed, 34 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 27df240..0e5f674 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -791,7 +791,6 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> >  	struct drm_device *dev = intel_dig_port->base.base.dev;
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg;
> > -	uint32_t ch_data = ch_ctl + 4;
> >  	uint32_t aux_clock_divider;
> >  	int i, ret, recv_bytes;
> >  	uint32_t status;
> > @@ -857,7 +856,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> >  		for (try = 0; try < 5; try++) {
> >  			/* Load the send data into the aux channel data registers */
> >  			for (i = 0; i < send_bytes; i += 4)
> > -				I915_WRITE(ch_data + i,
> > +				I915_WRITE(intel_dp->aux_ch_data_reg[i >> 2],
> >  					   intel_dp_pack_aux(send + i,
> >  							     send_bytes - i));
> >  
> > @@ -921,7 +920,7 @@ done:
> >  		recv_bytes = recv_size;
> >  
> >  	for (i = 0; i < recv_bytes; i += 4)
> > -		intel_dp_unpack_aux(I915_READ(ch_data + i),
> > +		intel_dp_unpack_aux(I915_READ(intel_dp->aux_ch_data_reg[i >> 2]),
> >  				    recv + i, recv_bytes - i);
> >  
> >  	ret = recv_bytes;
> > @@ -1009,19 +1008,22 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
> >  	return ret;
> >  }
> >  
> > -static uint32_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv,
> > -				enum port port)
> > +static uint32_t g4x_aux_reg(struct drm_i915_private *dev_priv,
> > +			    enum port port, int index)
> >  {
> > -	return DP_AUX_CH_CTL(port);
> > +	return index < 0 ? DP_AUX_CH_CTL(port) :
> > +		DP_AUX_CH_DATA(port, index);
> >  }
> >  
> > -static uint32_t ilk_aux_ctl_reg(struct drm_i915_private *dev_priv,
> > -				enum port port)
> > +static uint32_t ilk_aux_reg(struct drm_i915_private *dev_priv,
> > +			    enum port port, int index)
> >  {
> >  	if (port == PORT_A)
> > -		return DP_AUX_CH_CTL(port);
> > +		return index < 0 ? DP_AUX_CH_CTL(port) :
> > +			DP_AUX_CH_DATA(port, index);
> >  	else
> > -		return PCH_DP_AUX_CH_CTL(port);
> > +		return index < 0 ? PCH_DP_AUX_CH_CTL(port) :
> > +			PCH_DP_AUX_CH_DATA(port, index);
> >  }
> >  
> >  /*
> > @@ -1048,13 +1050,28 @@ static enum port skl_porte_aux_port(struct drm_i915_private *dev_priv)
> >  	}
> >  }
> >  
> > -static uint32_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv,
> > -				enum port port)
> > +static uint32_t skl_aux_reg(struct drm_i915_private *dev_priv,
> > +			    enum port port, int index)
> >  {
> >  	if (port == PORT_E)
> >  		port = skl_porte_aux_port(dev_priv);
> >  
> > -	return DP_AUX_CH_CTL(port);
> > +	return index < 0 ? DP_AUX_CH_CTL(port) :
> > +		DP_AUX_CH_DATA(port, index);
> > +}
> > +
> > +static void aux_reg_init(struct intel_dp *intel_dp,
> > +			 uint32_t (*aux_reg)(struct drm_i915_private *dev_priv,
> > +					     enum port port, int index))
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp));
> > +	enum port port = dp_to_dig_port(intel_dp)->port;
> > +	int i;
> > +
> > +	intel_dp->aux_ch_ctl_reg = aux_reg(dev_priv, port, -1);
> > +
> > +	for (i = 0; i < ARRAY_SIZE(intel_dp->aux_ch_data_reg); i++)
> > +		intel_dp->aux_ch_data_reg[i] = aux_reg(dev_priv, port, i);
> >  }
> >  
> >  static void
> > @@ -1074,11 +1091,11 @@ intel_dp_aux_init(struct intel_dp *intel_dp, struct intel_connector *connector)
> >  	};
> >  
> >  	if (INTEL_INFO(dev_priv)->gen >= 9)
> > -		intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg(dev_priv, port);
> > +		aux_reg_init(intel_dp, skl_aux_reg);
> >  	else if (HAS_PCH_SPLIT(dev_priv))
> > -		intel_dp->aux_ch_ctl_reg = ilk_aux_ctl_reg(dev_priv, port);
> > +		aux_reg_init(intel_dp, ilk_aux_reg);
> >  	else
> > -		intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg(dev_priv, port);
> > +		aux_reg_init(intel_dp, g4x_aux_reg);
> 
> 
> IMO there's too much trickery in this patch to get the registers set
> up. -1 for ctl, i >> 2 to get the right index, function pointers for set
> up only, etc. I don't think it would be too much duplication to add
> separate initializers for each group of platforms, ditching the function
> pointers and -1 for ctl.

Less LOC, less bugs. But I can blow up the LOC count here if people
prefer that.

> 
> BR,
> Jani.
> 
> 
> 
> 
> >  
> >  	intel_dp->aux.name = ddc_name[port];
> >  	intel_dp->aux.dev = dev->dev;
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index 1df6ebf..3fea039 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -717,6 +717,7 @@ struct sink_crc {
> >  struct intel_dp {
> >  	uint32_t output_reg;
> >  	uint32_t aux_ch_ctl_reg;
> > +	uint32_t aux_ch_data_reg[5];
> >  	uint32_t DP;
> >  	int link_rate;
> >  	uint8_t lane_count;
> > -- 
> > 2.4.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-09-28 14:36 UTC|newest]

Thread overview: 136+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-18 17:03 [PATCH 00/43] drm/i915: Type safe register read/write and a ton of prep work ville.syrjala
2015-09-18 17:03 ` [PATCH 01/43] drm/i915: Don't pass sdvo_reg to intel_sdvo_select_{ddc, i2c}_bus() ville.syrjala
2015-09-21  7:34   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 02/43] drm/i915: Parametrize LRC registers ville.syrjala
2015-09-21  7:36   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 03/43] drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS ville.syrjala
2015-09-21  7:37   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 04/43] drm/i915: Parametrize fence registers ville.syrjala
2015-09-21  7:45   ` Jani Nikula
2015-09-21 12:33     ` Ville Syrjälä
2015-09-21 13:07       ` Ville Syrjälä
2015-09-21 15:05   ` [PATCH v2 " ville.syrjala
2015-09-25 12:02     ` Jani Nikula
2015-09-28  8:31       ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 05/43] drm/i915: Parametrize FBC_TAG registers ville.syrjala
2015-09-21  7:46   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 06/43] drm/i915: Parametrize ILK turbo registers ville.syrjala
2015-09-21  7:47   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 07/43] drm/i915: Replace raw numbers with the approproate register name in ILK turbo code ville.syrjala
2015-09-21  7:48   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 08/43] drm/i915: Parametrize TV luma/chroma filter registers ville.syrjala
2015-09-21  7:50   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 09/43] drm/i915: Parametrize DDI_BUF_TRANS registers ville.syrjala
2015-09-21  7:59   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 10/43] drm/i915: Parametrize CSR_PROGRAM registers ville.syrjala
2015-09-23 14:15   ` Mika Kuoppala
2015-09-23 15:17     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 11/43] drm/i915: Parametrize UOS_RSA_SCRATCH ville.syrjala
2015-09-28 11:39   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 12/43] drm/i915: Add LO/HI PRIVATE_PAT registers ville.syrjala
2015-09-28 11:40   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 13/43] drm/i915: Always use GEN8_RING_PDP_{LDW, UDW} instead of hand rolling the register offsets ville.syrjala
2015-09-28 11:42   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 14/43] drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR ville.syrjala
2015-09-28 11:44   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 15/43] drm/i915: Parametrize PALETTE and LGC_PALETTE ville.syrjala
2015-09-28 11:45   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 16/43] drm/i915: s/_CURACNTR/CURCNTR(PIPE_A)/ ville.syrjala
2015-09-22 16:47   ` [PATCH v2 " ville.syrjala
2015-09-28 11:50     ` Jani Nikula
2015-09-28 13:35       ` Daniel Vetter
2015-09-28 11:49   ` [PATCH " Jani Nikula
2015-09-18 17:03 ` [PATCH 17/43] drm/i915: s/_FDI_RXA_.../FDI_RX_...(PIPE_A)/ ville.syrjala
2015-09-29 14:14   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 18/43] drm/i915: s/_TRANSA_CHICKEN/TRANS_CHICKEN(PIPE_A)/ ville.syrjala
2015-09-29 14:16   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 19/43] drm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc ville.syrjala
2015-09-30 13:44   ` Jani Nikula
2015-09-30 13:53     ` Ville Syrjälä
2015-09-30 14:06   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 20/43] drm/i915: Use paramtrized WRPLL_CTL() ville.syrjala
2015-09-30 13:58   ` Jani Nikula
2015-09-30 14:00     ` Ville Syrjälä
2015-10-26 14:49     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 21/43] drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASE ville.syrjala
2015-09-28 11:53   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 22/43] drm/i915: s/DDI_BUF_CTL_A/DDI_BUF_CTL(PORT_A)/ ville.syrjala
2015-09-28 11:53   ` Jani Nikula
2015-09-28 13:38     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 23/43] drm/i915: Eliminate weird parameter inversion from BXT PPS registers ville.syrjala
2015-10-12 16:41   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 24/43] drm/i915: Parametrize HSW video DIP data registers ville.syrjala
2015-10-12 15:54   ` Jesse Barnes
2015-10-12 16:15     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 25/43] drm/i915: Include gpio_mmio_base in GMBUS reg defines ville.syrjala
2015-10-12 15:56   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 26/43] drm/i915: Protect register macro arguments ville.syrjala
2015-10-12 16:03   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 27/43] drm/i915: Fix a few bad hex numbers in register defines ville.syrjala
2015-10-12 16:04   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 28/43] drm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a function ville.syrjala
2015-10-12 16:05   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 29/43] drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc ville.syrjala
2015-10-12 16:06   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 30/43] drm/i915: Parametrize and fix SWF registers ville.syrjala
2015-10-12 16:07   ` Jesse Barnes
2015-10-12 16:17     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 31/43] drm/i915: Throw out some useless variables ville.syrjala
2015-09-22 16:50   ` [PATCH v2 " ville.syrjala
2015-10-12 16:09     ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 32/43] drm/i915: Clean up LVDS register handling ville.syrjala
2015-10-12 16:09   ` Jesse Barnes
2015-11-01 15:33   ` Lukas Wunner
2015-11-04 16:59     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 33/43] drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE ville.syrjala
2015-10-12 16:12   ` Jesse Barnes
2015-10-13 11:21     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 34/43] drm/i915: Turn __raw_i915_read8() & co. in to inline functions ville.syrjala
2015-09-18 17:03 ` [PATCH 35/43] drm/i915: Move __raw_i915_read8() & co. into i915_drv.h ville.syrjala
2015-09-18 17:42   ` Chris Wilson
2015-09-18 18:23     ` Ville Syrjälä
2015-09-18 18:33       ` Chris Wilson
2015-09-18 18:37         ` Ville Syrjälä
2015-09-18 18:44           ` Chris Wilson
2015-09-18 19:26             ` Ville Syrjälä
2015-09-21 16:26               ` Jesse Barnes
2015-09-21 16:53                 ` Ville Syrjälä
2015-09-21 16:57                   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 36/43] drm/i915: Remove the magic AUX_CTL is at DP + foo tricks ville.syrjala
2015-09-18 17:03 ` [PATCH 37/43] drm/i915: Replace the aux ddc name switch statement with a table ville.syrjala
2015-09-18 17:03 ` [PATCH 38/43] drm/i915: Parametrize AUX registes ville.syrjala
2015-09-28 12:15   ` Jani Nikula
2015-09-28 13:28     ` Daniel Vetter
2015-09-28 13:34       ` Ville Syrjälä
2015-09-28 13:52         ` Daniel Vetter
2015-09-28 13:57           ` Jani Nikula
2015-09-28 15:09   ` [PATCH v2 38/43] drm/i915: Parametrize AUX registers ville.syrjala
2015-10-20 13:05     ` Jani Nikula
2015-10-20 13:37       ` Ville Syrjälä
2015-10-20 14:00     ` [PATCH v3 " ville.syrjala
2015-10-21  7:08       ` Jani Nikula
2015-09-18 17:03 ` [PATCH 39/43] drm/i915: Add dev_priv->psr_mmio_base ville.syrjala
2015-10-20 13:08   ` Jani Nikula
2015-10-20 14:01   ` [PATCH v2 " ville.syrjala
2015-10-21  7:09     ` Jani Nikula
2015-09-18 17:03 ` [PATCH 40/43] drm/i915: Store aux data reg offsets in intel_dp->aux_ch_data_reg[] ville.syrjala
2015-09-28 12:28   ` Jani Nikula
2015-09-28 14:36     ` Ville Syrjälä [this message]
2015-09-28 15:10   ` [PATCH v2 " ville.syrjala
2015-10-20 14:02     ` [PATCH v3 " ville.syrjala
2015-09-18 17:03 ` [PATCH 41/43] drm/i915: Model PSR AUX register selection more like the normal AUX code ville.syrjala
2015-09-28 15:11   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 42/43] drm/i915: Prefix raw register defines with underscore ville.syrjala
2015-09-18 17:03 ` [RFC][PATCH 43/43] WIP: drm/i915: Type safe register read/write ville.syrjala
2015-09-18 17:33   ` Chris Wilson
2015-09-18 17:43     ` Ville Syrjälä
2015-09-18 18:12       ` Chris Wilson
2015-09-18 18:34         ` Ville Syrjälä
2015-09-23 15:23   ` Daniel Vetter
2015-09-24 15:38     ` Ville Syrjälä
2015-09-28 12:56       ` Jani Nikula
2015-09-28 13:03         ` Ville Syrjälä
2015-09-28 13:52           ` Daniel Vetter
2015-09-18 18:17 ` [PATCH 00/43] drm/i915: Type safe register read/write and a ton of prep work Chris Wilson
2015-09-22 17:41 ` Ville Syrjälä
2015-10-28 12:55 ` Jani Nikula

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150928143647.GQ26517@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox