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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chandra Konduru <chandra.konduru@intel.com>
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org,
	ville.syrjala@intel.com
Subject: Re: [PATCH 06/15] drm/i915: Upscale scaler max scale for NV12.
Date: Tue, 29 Sep 2015 20:48:44 +0300	[thread overview]
Message-ID: <20150929174844.GF26517@intel.com> (raw)
In-Reply-To: <1441420391-19109-7-git-send-email-chandra.konduru@intel.com>

On Fri, Sep 04, 2015 at 07:33:02PM -0700, Chandra Konduru wrote:
> This patch updates max supported scaler limits for NV12.
> 
> v2:
> -Rebased to current kernel version 4.2.0.rc4 (me)
> 
> v3:
> -simplified max_scale calculation (Ville)
> 
> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   17 +++++++++++++----
>  drivers/gpu/drm/i915/intel_drv.h     |    3 ++-
>  drivers/gpu/drm/i915/intel_sprite.c  |    2 +-
>  3 files changed, 16 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 8869779..3f9111e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13423,7 +13423,9 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
>  }
>  
>  int
> -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state)
> +skl_max_scale(struct intel_crtc *intel_crtc,
> +	struct intel_crtc_state *crtc_state,
> +	uint32_t pixel_format)

Indent fail, but otherwise looks good so

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  {
>  	int max_scale;
>  	struct drm_device *dev;
> @@ -13443,11 +13445,17 @@ skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state
>  
>  	/*
>  	 * skl max scale is lower of:
> -	 *    close to 3 but not 3, -1 is for that purpose
> +	 *    close to 2 or 3 (NV12: 2, other formats: 3) but not equal,
> +	 *          -1 is for that purpose
>  	 *            or
>  	 *    cdclk/crtc_clock
>  	 */
> -	max_scale = min((1 << 16) * 3 - 1, (1 << 8) * ((cdclk << 8) / crtc_clock));
> +	if (pixel_format == DRM_FORMAT_NV12)
> +		max_scale = (2 << 16) - 1;
> +	else
> +		max_scale = (3 << 16) - 1;
> +
> +	max_scale = min(max_scale, (1 << 8) * ((cdclk << 8) / crtc_clock));
>  
>  	return max_scale;
>  }
> @@ -13467,7 +13475,8 @@ intel_check_primary_plane(struct drm_plane *plane,
>  	if (INTEL_INFO(plane->dev)->gen >= 9 &&
>  	    state->ckey.flags == I915_SET_COLORKEY_NONE) {
>  		min_scale = 1;
> -		max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state);
> +		max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state,
> +				fb ? fb->pixel_format : 0);
>  		can_position = true;
>  	}
>  
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 18632a4..d50b8cb 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1140,7 +1140,8 @@ void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc);
>  void intel_modeset_preclose(struct drm_device *dev, struct drm_file *file);
>  
>  int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
> -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
> +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
> +	uint32_t pixel_format);
>  
>  unsigned long intel_plane_obj_offset(struct intel_plane *intel_plane,
>  				     struct drm_i915_gem_object *obj,
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 8b73bb8..66d60ae 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -780,7 +780,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
>  		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
>  			can_scale = 1;
>  			min_scale = 1;
> -			max_scale = skl_max_scale(intel_crtc, crtc_state);
> +			max_scale = skl_max_scale(intel_crtc, crtc_state, fb->pixel_format);
>  		} else {
>  			can_scale = 0;
>  			min_scale = DRM_PLANE_HELPER_NO_SCALING;
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-09-29 17:48 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-05  2:32 [PATCH 00/15] drm/i915: Adding NV12 for skylake display Chandra Konduru
2015-09-05  2:32 ` [PATCH 01/15] drm/i915: Allocate min dbuf blocks per bspec Chandra Konduru
2015-09-29 17:45   ` Ville Syrjälä
2015-09-30 12:20     ` Daniel Vetter
2015-09-05  2:32 ` [PATCH 02/15] drm/i915: In DBUF/WM calcs for 90/270, swap w & h Chandra Konduru
2015-09-29 17:46   ` Ville Syrjälä
2015-09-05  2:32 ` [PATCH 03/15] drm/i915: Set scaler mode for NV12 Chandra Konduru
2015-09-29 17:47   ` Ville Syrjälä
2015-09-30 12:22     ` Daniel Vetter
2015-09-30 15:18       ` Daniel Vetter
2015-09-05  2:33 ` [PATCH 04/15] drm/i915: Stage scaler request for NV12 as src format Chandra Konduru
2015-09-10 17:36   ` Ville Syrjälä
2015-09-10 19:00     ` Konduru, Chandra
2015-09-11 16:43   ` Chandra Konduru
2015-09-05  2:33 ` [PATCH 05/15] drm/i915: Update format_is_yuv() to include NV12 Chandra Konduru
2015-09-29 17:47   ` Ville Syrjälä
2015-09-05  2:33 ` [PATCH 06/15] drm/i915: Upscale scaler max scale for NV12 Chandra Konduru
2015-09-29 17:48   ` Ville Syrjälä [this message]
2015-09-05  2:33 ` [PATCH 07/15] drm/i915: Add NV12 as supported format for primary plane Chandra Konduru
2015-09-10 17:40   ` Ville Syrjälä
2015-09-10 21:06     ` Konduru, Chandra
2015-09-10 21:28       ` Ville Syrjälä
2015-09-10 22:00         ` Konduru, Chandra
2015-09-14  8:43         ` Daniel Vetter
2015-09-16  1:34           ` Konduru, Chandra
2015-09-11 16:43   ` Chandra Konduru
2015-09-29 18:47     ` Ville Syrjälä
2015-09-05  2:33 ` [PATCH 08/15] drm/i915: Add NV12 as supported format for sprite plane Chandra Konduru
2015-09-29 17:50   ` Ville Syrjälä
2015-09-29 19:00     ` Ville Syrjälä
2015-09-05  2:33 ` [PATCH 09/15] drm/i915: Add NV12 support to intel_framebuffer_init Chandra Konduru
2015-09-09 22:59   ` Chandra Konduru
2015-09-10 18:34     ` Ville Syrjälä
2015-09-10 19:14       ` Konduru, Chandra
2015-09-10 19:43         ` Ville Syrjälä
2015-09-10 20:45           ` Konduru, Chandra
2015-09-14  8:45             ` Daniel Vetter
2015-09-16  1:35               ` Konduru, Chandra
2015-09-10 19:46       ` Ville Syrjälä
2015-09-10 20:59         ` Konduru, Chandra
     [not found]         ` <76A9B330A4D78C4D99CB292C4CC06C0E370D47CC@fmsmsx101.amr.corp.intel.com>
2015-09-21 16:14           ` Konduru, Chandra
2015-09-11 16:44   ` Chandra Konduru
2015-09-29 18:58     ` Ville Syrjälä
2015-09-30 22:58       ` Konduru, Chandra
2015-10-01 11:37         ` Ville Syrjälä
2015-10-01 11:41           ` Ville Syrjälä
2015-10-01 18:36             ` Konduru, Chandra
2015-09-05  2:33 ` [PATCH 10/15] drm/i915: Add NV12 to primary plane programming Chandra Konduru
2015-09-05  2:33 ` [PATCH 11/15] drm/i915: Add NV12 to sprite " Chandra Konduru
2015-09-05  2:33 ` [PATCH 12/15] drm/i915: Set initial phase & trip for NV12 scaler Chandra Konduru
2015-09-29 18:37   ` Ville Syrjälä
2015-09-05  2:33 ` [PATCH 13/15] drm/i915: skl nv12 wa - disable streamer fix Chandra Konduru
2015-09-05  2:33 ` [PATCH 14/15] drm/i915: skl nv12 wa - NV12 to RGB switch Chandra Konduru
2015-09-09 23:00   ` Chandra Konduru
2015-09-05  2:33 ` [PATCH 15/15] drm/i915: Add 90/270 rotation for NV12 format Chandra Konduru

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